PIC18F2221 datasheet(153/402 Pages) MICROCHIP

153 / 402 page

DS39689F-page 153

PIC18F2221/2321/4221/4321 FAMILY

17.0 ENHANCED CAPTURE/

COMPARE/PWM (ECCP)

MODULE

In PIC18F4221/4321 devices, CCP1 is implemented

as a standard CCP module with Enhanced PWM

capabilities. These include the provision for 2 or

4 output channels, user-selectable polarity, dead-band

control and automatic shutdown and restart. The

Enhanced features are discussed in detail in

Section 17.4 “Enhanced PWM Mode”. Capture,

Compare and single-output PWM functions of the

ECCP module are the same as described for the

standard CCP module.

The control register for the Enhanced CCP module is

shown in Register 17-1. It differs from the CCPxCON

registers in PIC18F2221/2321 devices in that the two

Most Significant bits are implemented to control PWM

functionality.

CCP1CON REGISTER (ECCP1 MODULE, 40/44-PIN DEVICES)

Note:

The ECCP module is implemented only in

40/44-pin devices.

R/W-0

P1M1

P1M0

DC1B1

DC1B0

CCP1M3

CCP1M2

CCP1M1

CCP1M0

bit 7

bit 0

bit 7-6

P1M<1:0>: Enhanced PWM Output Configuration bits

If CCP1M<3:2> = 00, 01, 10:

xx = P1A assigned as Capture/Compare input/output; P1B, P1C, P1D assigned as port pins

If CCP1M<3:2> = 11:

00 = Single output: P1A modulated; P1B, P1C, P1D assigned as port pins

01 = Full-bridge output forward: P1D modulated; P1A active; P1B, P1C inactive

10 = Half-bridge output: P1A, P1B modulated with dead-band control; P1C, P1D assigned

as port pins

11 = Full-bridge output reverse: P1B modulated; P1C active; P1A, P1D inactive

bit 5-4

DC1B<1:0>: PWM Duty Cycle bit 1 and bit 0

Capture mode:

Unused.

Compare mode:

Unused.

PWM mode:

These bits are the two LSbs of the 10-bit PWM duty cycle. The eight MSbs of the duty cycle are

found in CCPR1L.

bit 3-0

CCP1M<3:0>: Enhanced CCP Mode Select bits

0000 = Capture/Compare/PWM off (resets ECCP module)

0001 = Reserved

0010 = Compare mode, toggle output on match

0011 = Capture mode

0100 = Capture mode, every falling edge

0101 = Capture mode, every rising edge

0110 = Capture mode, every 4th rising edge

0111 = Capture mode, every 16th rising edge

1000 = Compare mode, initialize CCP1 pin low, set output on compare match (set CCP1IF)

1001 = Compare mode, initialize CCP1 pin high, clear output on compare match (set CCP1IF)

1010 = Compare mode, generate software interrupt only, CCP1 pin reverts to I/O state

1011 = Compare mode, trigger special event (ECCP resets TMR1 or TMR3, sets CC1IF bit)

1100 = PWM mode; P1A, P1C active-high; P1B, P1D active-high

1101 = PWM mode; P1A, P1C active-high; P1B, P1D active-low

1110 = PWM mode; P1A, P1C active-low; P1B, P1D active-high

1111 = PWM mode; P1A, P1C active-low; P1B, P1D active-low

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

PIC18F2221 Datasheet(PDF) 153 Page - Microchip Technology

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