MIC3003 datasheet(55/75 Pages) MICREL

55 / 75 page

Micrel, Inc.

MIC3003

November 2009

M9999-111209-C

hbwhelp@micrel.com or (408) 955-1690

RESETOUT

D[7]

reserved

read-only

D[6]

reserved

read-only

D[5]

reserved

read-only

D[4]

reserved

read-only

D[3]

reserved

read-only

D[2]

RESETOUT

read/write

D[1]

RESETOUT

read/write

D[0]

RESETOUT

read/write

Default Value

0000 0000b = 00h

Serial address

A2h

Byte address

255 = FFh

Bit(s)

Function

Operation

D[7-3]

Reserved

Read-only; these bits always return 00000.

D[2:0]

RESETOUT

Controls the reset output at pin 17

(QGPO) when Reset mode is

selected (OEMCFG3-7 set to 1)

By default, these three bits are 000, and the QGPO output

is undriven.

If RESET mode is selected in OEMCFG3:

When the three bits are written to 111, QGPO’s open-drain

output will be driven low for 125 μs (typical), after which

QGPO reenters the undriven state.

The RESETOUT field is cleared from 111 to 000 22.5 ms

(typical) after the deassertion edge of QGPO. Other values

of this delay may be selected in the TRSTCLR[2:0] field in

OEMCFG2.

If Reset mode in OEMCFG3 is not selected, these three

bits have no function.

MIC3003 Datasheet(PDF) 55 Page - Micrel Semiconductor

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