AT90SCR100 datasheet(231/433 Pages) ATMEL

231 / 433 page

231

TPR0327AY–SMS–30Jan09

AT90SCR100

18. USART

The Universal Synchronous and Asynchronous serial Receiver and Transmitter (USART) is a

highly flexible serial communication device.

18.1

Features

• Full Duplex Operation (Independent Serial Receive and Transmit Registers)

• Asynchronous or Synchronous Operation

• Master or Slave Clocked Synchronous Operation

• High Resolution Baud Rate Generator

• Supports Serial Frames with 5, 6, 7, 8, or 9 Data Bits and 1 or 2 Stop Bits

• Odd or Even Parity Generation and Parity Check Supported by Hardware

• Data OverRun Detection

• Framing Error Detection

• Noise Filtering Includes False Start Bit Detection and Digital Low Pass Filter

• Three Separate Interrupts on TX Complete, TX Data Register Empty and RX Complete

• Multi-processor Communication Mode

• Double Speed Asynchronous Communication Mode

18.2

USART0

The AT90SCR100 has one USART, USART0.

18.3

Overview

A simplified block diagram of the USART Transmitter is shown in Figure 18-1 on page 232. CPU

accessible I/O Registers and I/O pins are shown in bold.

The Power Reducion USART0 bit, PRUSART0, in TBC must be disabled by writing a logical

zero to it.

AT90SCR100 Datasheet(PDF) 231 Page - ATMEL Corporation