AT90SCR100 datasheet(284/433 Pages) ATMEL

284 / 433 page

284

TPR0327AY–SMS–30Jan09

AT90SCR100

Figure 21-7.

SPI - Slave with DPRAM operation - Second part

If the number of bytes to be received or sent is not known, a timeout can be used. It can be acti-

vated by entering a time bit value in the HSSPITIMEOUT and setting the HSSPICR.STTTO bit.

As the amount of data is unknown, the two registers (HSSPICNT) have to be set to the maxi-

mum value, 16. When the timeout occurs, the HSSPIIR.TIMEOUT bit is set. If the HSSPI

interrupt enable bit and the HSSPIIER.TIMEOUTIE bit have been previously set, an interrupt is

generated. The number of byte received is available in the HSSPICNT register. Clearing the

HSSPIIR.TIMEOUT bit by soft or by setting the HSSPICR.STTTO bit will update the internal

DPRAM

nb_data to

receive known?

LABEL

"RECEIVE DATA"

nb_data to receive >16?

rx_buf_full?

Write nb_data to

receive in HSSPICNT

Write 16 in HSSPICNT

Wait BTD (HSSPIIR)

Write 16 in

HSSPICNT

Clear BTD (HSSPIIR)

YES

GOTO LABEL

"RECEIVE DATA UK"

Clear BTD (HSSPIIR)

nb_data to receive >16?

YES

Write nb_data left

in HSSPICNT

Read HSSPICNT

Start copy of received data into

RAM using HSSPIDMA.

Read received data directly in RAM

Read HSSPICNT

Start copy of received data into

RAM using HSSPIDMA.

Read received data directly in RAM

AT90SCR100 Datasheet(PDF) 284 Page - ATMEL Corporation

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