AT90SCR100 datasheet(298/433 Pages) ATMEL

298 / 433 page

298

TPR0327AY–SMS–30Jan09

AT90SCR100

The Power Reduction TWI bit, PRTWI bit in PRR0 must be written to zero to enable the TWI

Serial Interface.

22.2.2

Electrical Interconnection

The number of devices that can be connected to the bus is only limited by the bus capacitance-

limit of 400 pF and the 7-bit slave address space. A detailed specification of the electrical

characteristics of the TWI is given in section “2-wire Serial Interface Characteristics TBC/TBD”

on page 411. Two different sets of specifications are presented there, one relevant for bus

speeds below 100 kHz, and one valid for bus speeds up to 400 kHz.

22.3

Data Transfer and Frame Format

22.3.1

Transferring Bits

Each data bit transferred on the TWI bus is accompanied by a pulse on the clock line. The level

of the data line must be stable when the clock line is high. The only exception to this rule is for

generating start and stop conditions.

Figure 22-2.

Data Validity

22.3.2

START and STOP Conditions

The Master initiates and terminates a data transmission. The transmission is initiated when the

Master issues a START condition on the bus, and it is terminated when the Master issues a

STOP condition. Between a START and a STOP condition, the bus is considered busy, and no

other master should try to seize control of the bus. A special case occurs when a new START

condition is issued between a START and STOP condition. This is referred to as a REPEATED

START condition, and is used when the Master wishes to initiate a new transfer without relin-

quishing control of the bus. After a REPEATED START, the bus is considered busy until the next

STOP. This is identical to the START behavior, and therefore START is used to describe both

START and REPEATED START for the remainder of this datasheet, unless otherwise noted. As

Slave

The device addressed by a Master.

Transmitter

The device placing data on the bus.

Receiver

The device reading data from the bus.

Table 22-1.

TWI Terminology

Term

Description

SDA

SCL

Data Stable

Data Change

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