AT90SCR100 datasheet(343/433 Pages) ATMEL

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TPR0327AY–SMS–30Jan09

AT90SCR100

This bit is set and cleared by software.

When this bit is cleared, AESADDR register points to Key AES registers.

When this bit is set, AESADDR register points to Data AES registers.

25.3.3

AESADDR - AES Address Register

This register permits to target a specific byte inside AES internal memory. According to

AESACR.KD value, the AESADDR targets Key of Data internal registers.

When writing this register, the AESDR data register will be updated to the newly data or key byte

pointed.

This register can be automatically increment, if AESACR.AUTOINC bit is set, when writing new

data in AESDR. This will update AESDR after write operation, to the newly pointed byte.

25.3.4

AESDR - AES Data Register

This register permits to observe the internal key and data registers of the AES block.

When AESADDR register is modified, this register is updated to the newly pointed address.

When writing AESDR register, the data targeted by AESACR.KD and AESADDR will be auto-

matically updated, according to AESACR.XOR bit.

25.4

Example. Code Sample

Below is code examples of how to initialize AES block to perform AES CBC.

;- This routine performs a AES128 bit encryption

;-registers used:

; storing and restoring of registers is not included in the routine

; register usage can be optimized at the expense of code size

;-When jumping into these procedures, Z targets the key to use and

;Y the data to encrypt. X targets to the storage of the encrypted

;data

;-It is assumed that interruptions are disabled

vAES128_Encrypt:

; Loading Key

ldi

r16, (1<<AUTOINC)

sts

AESACR, r16

Bit

76543

$007A

ADDR [7..0]

AESADDR

Read/write

R/W

Initial value

xxxxx

Bit

7654

$007B

DATA [7..0]

AESDR

Read/write

R/W

Initial value

AT90SCR100 Datasheet(PDF) 343 Page - ATMEL Corporation

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