DSPIC33FJ32GS608 datasheet(333/416 Pages) MICROCHIP

333 / 416 page

 2009 Microchip Technology Inc.

Preliminary

DS70591B-page 333

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610

24.0 SPECIAL FEATURES

The

dsPIC33FJ32GS406/606/608/610

and

dsPIC33FJ64GS406/606/608/610

devices

include

several features intended to maximize application

flexibility and reliability, and minimize cost through

elimination of external components. These are:

• Flexible Configuration

• Watchdog Timer (WDT)

• Code Protection and CodeGuard™ Security

• JTAG Boundary Scan Interface

• In-Circuit Serial Programming™ (ICSP™)

• In-Circuit Emulation

• Brown-out Reset (BOR)

24.1

Configuration Bits

The Configuration bits can be programmed (read

as ‘0’), or left unprogrammed (read as ‘1’), to select

various device configurations. These bits are mapped

starting at program memory location 0xF80000.

The individual Configuration bit descriptions for the

Configuration registers are shown in Table 24-2.

Note that address, 0xF80000, is beyond the user pro-

gram memory space. It belongs to the configuration

memory space (0x800000-0xFFFFFF), which can only

be accessed using table reads and table writes.

The device Configuration register map is shown in

Table 24-1.

Note 1: This data sheet summarizes the features

of the dsPIC33FJ32GS406/606/608/610

and

dsPIC33FJ64GS406/606/608/610

devices. It is not intended to be a compre-

hensive reference source. To comple-

ment the information in this data sheet,

refer to the “dsPIC33F/PIC24H Family

Reference Manual”. Please see the

Microchip web site (www.microchip.com)

for the latest “dsPIC33F/PIC24H Family

Reference Manual” sections.

2: Some registers and associated bits

described in this section may not be avail-

able on all devices. Refer to Section 4.0

“Memory Organization” in this data

sheet for device-specific register and bit

information.

TABLE 24-1:

DEVICE CONFIGURATION REGISTER MAP

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0xF80000 FBS

—

BSS<2:0>

BWRP

0xF80002 RESERVED

—

0xF80004 FGS

—

GSS<1:0>

GWRP

0xF80006 FOSCSEL

IESO

—

—FNOSC<2:0>

0xF80008 FOSC

FCKSM<1:0>

—

OSCIOFNC POSCMD<1:0>

0xF8000A FWDT

FWDTEN

WINDIS

—

WDTPRE

WDTPOST<3:0>

0xF8000C FPOR

—

ALTQIO

ALTSS1

—

—FPWRT<2:0>

0xF8000E FICD

Reserved(1) Reserved(1)

JTAGEN

—

—ICS<1:0>

0xF80010 FCMP

—

CMPPOL1(2)

HYST1<1:0>(2)

CMPPOL0(2) HYST0<1:0>(2)

Legend: — = unimplemented bit, read as ‘0’.

Note 1: These bits are reserved for use by development tools and must be programmed as ‘1’.

2: These bits are reserved on dsPIC33FJXXXGS406 devices and always read as ‘1’.

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