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dsPIC33FJ32GS608 Datasheet(PDF) 183 Page - Microchip Technology

Part # dsPIC33FJ32GS608
Description  High-Performance, 16-bit Digital Signal Controllers
PDF  416 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

dsPIC33FJ32GS608 Datasheet(HTML) 183 Page - Microchip Technology

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 2009 Microchip Technology Inc.
Preliminary
DS70591B-page 183
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
REGISTER 8-7:
DMACS0: DMA CONTROLLER STATUS REGISTER 0
U-0
U-0
U-0
U-0
R/C-0
R/C-0
R/C-0
R/C-0
—
—
—
—
PWCOL3
PWCOL2
PWCOL1
PWCOL0
bit 15
bit 8
U-0
U-0
U-0
U-0
R/C-0
R/C-0
R/C-0
R/C-0
—
—
—
—
XWCOL3
XWCOL2
XWCOL1
XWCOL0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-12
Unimplemented: Read as ‘0’
bit 11
PWCOL3: Channel 3 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
bit 10
PWCOL2: Channel 2 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
bit 9
PWCOL1: Channel 1 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
bit 8
PWCOL0: Channel 0 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
bit 7-4
Unimplemented: Read as ‘0’
bit 3
XWCOL3: Channel 3 DMA RAM Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
bit 2
XWCOL2: Channel 2 DMA RAM Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
bit 1
XWCOL1: Channel 1 DMA RAM Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
bit 0
XWCOL0: Channel 0 DMA RAM Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected



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