DSPIC33FJ32GS608 datasheet(184/416 Pages) MICROCHIP

184 / 416 page

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610

DS70591B-page 184

Preliminary

 2009 Microchip Technology Inc.

DMACS1: DMA CONTROLLER STATUS REGISTER 1

U-0

R-1

—

LSTCH<3:0>

bit 15

bit 8

U-0

R-0

—

PPST3

PPST2

PPST1

PPST0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-12

Unimplemented: Read as ‘0’

bit 11-8

LSTCH<3:0>: Last DMA Channel Active bits

1111 = No DMA transfer has occurred since system Reset

1110-0100 = Reserved

0011 = Last data transfer was by DMA Channel 3

0010 = Last data transfer was by DMA Channel 2

0001 = Last data transfer was by DMA Channel 1

0000 = Last data transfer was by DMA Channel 0

bit 7-4

Unimplemented: Read as ‘0’

bit 3

PPST3: Channel 3 Ping-Pong Mode Status Flag bit

1 = DMA3STB register selected

0 = DMA3STA register selected

bit 2

PPST2: Channel 2 Ping-Pong Mode Status Flag bit

1 = DMA2STB register selected

0 = DMA2STA register selected

bit 1

PPST1: Channel 1 Ping-Pong Mode Status Flag bit

1 = DMA1STB register selected

0 = DMA1STA register selected

bit 0

PPST0: Channel 0 Ping-Pong Mode Status Flag bit

1 = DMA0STB register selected

0 = DMA0STA register selected

dsPIC33FJ32GS608 Datasheet(PDF) 184 Page - Microchip Technology

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