| Electronic Components Datasheet Search |
|
PIC18F23K20-E/ML Datasheet(PDF) 443 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
PIC18F23K20-E/ML Datasheet(HTML) 443 Page - Microchip Technology |
|
443 / 456 page ![]() 2010 Microchip Technology Inc. DS41303G-page 443 PIC18F2XK20/4XK20 INDEX A A/D Analog Port Pins, Configuring .................................. 277 Associated Registers ............................................... 277 Conversions ............................................................. 268 Converter Characteristics ........................................ 401 Discharge ................................................................. 269 Selecting and Configuring Acquisition Time ............ 266 Special Event Trigger (ECCP) ................................. 174 Absolute Maximum Ratings ............................................. 369 AC (Timing) Characteristics ............................................. 383 Load Conditions for Device Timing Specifications ... 384 Parameter Symbology ............................................. 383 Temperature and Voltage Specifications ................. 384 Timing Conditions .................................................... 384 AC Characteristics Internal RC Accuracy ............................................... 386 Access Bank Mapping with Indexed Literal Offset Mode ................. 87 ACKSTAT ........................................................................ 225 ACKSTAT Status Flag ..................................................... 225 ADC ................................................................................. 265 Acquisition Requirements ........................................ 275 Block Diagram .......................................................... 265 Calculating Acquisition Time .................................... 275 Channel Selection .................................................... 266 Configuration ............................................................ 266 Conversion Clock ..................................................... 266 Conversion Procedure ............................................. 270 Internal Sampling Switch (RSS) IMPEDANCE ............. 275 Interrupts .................................................................. 267 Operation ................................................................. 268 Operation During Sleep ........................................... 269 Port Configuration .................................................... 266 Power Management ................................................. 269 Reference Voltage (VREF) ........................................ 266 Result Formatting ..................................................... 267 Source Impedance ................................................... 275 Special Event Trigger ............................................... 269 Starting an A/D Conversion ..................................... 267 ADCON0 Register ............................................................ 271 ADCON1 Register ............................................................ 272 ADCON2 Register ............................................................ 273 ADDFSR .......................................................................... 358 ADDLW ............................................................................ 321 ADDULNK ........................................................................ 358 ADDWF ............................................................................ 321 ADDWFC ......................................................................... 322 ADRESH Register (ADFM = 0) ........................................ 274 ADRESH Register (ADFM = 1) ........................................ 274 ADRESL Register (ADFM = 0) ......................................... 274 ADRESL Register (ADFM = 1) ......................................... 274 Analog Input Connection Considerations ......................... 286 Analog-to-Digital Converter. See ADC ANDLW ............................................................................ 322 ANDWF ............................................................................ 323 ANSEL (PORT Analog Control) ....................................... 136 ANSEL Register ............................................................... 136 ANSELH Register ............................................................ 137 Assembler MPASM Assembler .................................................. 366 B Bank Select Register (BSR) .............................................. 71 Baud Rate Generator ...................................................... 221 BAUDCON Register ........................................................ 248 BC .................................................................................... 323 BCF ................................................................................. 324 BF .................................................................................... 225 BF Status Flag ................................................................. 225 Block Diagrams ADC ......................................................................... 265 ADC Transfer Function ............................................ 276 Analog Input Model .......................................... 276, 286 Baud Rate Generator .............................................. 221 Capture Mode Operation ......................................... 146 CCP PWM ............................................................... 149 Clock Source ............................................................. 27 Comparator 1 ........................................................... 280 Comparator 2 ........................................................... 280 Comparator Voltage Reference ............................... 290 Compare Mode Operation ....................................... 147 Crystal Operation ....................................................... 31 EUSART Receive .................................................... 238 EUSART Transmit ................................................... 237 External POR Circuit (Slow VDD Power-up) .............. 53 External RC Mode ..................................................... 32 Fail-Safe Clock Monitor (FSCM) ................................ 40 Generic I/O Port ....................................................... 121 High/Low-Voltage Detect with External Input .......... 294 Interrupt Logic .......................................................... 108 MSSP (I2C Master Mode) ........................................ 219 MSSP (I2C Mode) .................................................... 202 MSSP (SPI Mode) ................................................... 193 On-Chip Reset Circuit ................................................ 51 PIC18F2XK20 ............................................................ 14 PIC18F4XK20 ............................................................ 15 PLL (HS Mode) .......................................................... 35 PORTD and PORTE (Parallel Slave Port) ............... 139 PWM (Enhanced) .................................................... 175 Reads from Flash Program Memory ......................... 93 Resonator Operation ................................................. 31 Table Read Operation ............................................... 89 Table Write Operation ............................................... 90 Table Writes to Flash Program Memory .................... 95 Timer0 in 16-Bit Mode ............................................. 157 Timer0 in 8-Bit Mode ............................................... 156 Timer1 ..................................................................... 160 Timer1 (16-Bit Read/Write Mode) ............................ 160 Timer2 ..................................................................... 168 Timer3 ..................................................................... 170 Timer3 (16-Bit Read/Write Mode) ............................ 171 Voltage Reference Output Buffer Example ............. 291 Watchdog Timer ...................................................... 308 BN .................................................................................... 324 BNC ................................................................................. 325 BNN ................................................................................. 325 BNOV .............................................................................. 326 BNZ ................................................................................. 326 BOR. See Brown-out Reset. BOV ................................................................................. 329 BRA ................................................................................. 327 Break Character (12-bit) Transmit and Receive .............. 256 BRG. See Baud Rate Generator. Brown-out Reset (BOR) ..................................................... 54 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |