HCS12 datasheet(294/452 Pages) FREESCALE

294 / 452 page

Instruction Glossary

S12CPUV2 Reference Manual, Rev. 4.0

294

Freescale Semiconductor

Operation:

(M) + [(B)

× ((M+1) – (M))] ⇒ A

Description:

Linearly interpolates one of 256 result values that fall between each pair of

data entries in a lookup table stored in memory. Data entries in the table

represent the Y values of endpoints of equally spaced line segments. Table

entries and the interpolated result are 8-bit values. The result is stored in

accumulator A.

Before executing TBL, an index register points to the table entry

corresponding to the X value (X1) that is closest to, but less than or equal

to, the desired lookup point (XL, YL). This defines the left end of a line

segment and the right end is defined by the next data entry in the table. Prior

to execution, accumulator B holds a binary fraction (radix point to left of

MSB), representing the ratio (XL–X1)

÷ (X2–X1).

The 8-bit unrounded result is calculated using the following expression:

A = Y1 + [(B)

× (Y2 – Y1)]

Where

(B) = (XL – X1)

÷ (X2 – X1)

Y1 = 8-bit data entry pointed to by <effective address>

Y2 = 8-bit data entry pointed to by <effective address> + 1

The intermediate value [(B)

× (Y2 – Y1)] produces a 16-bit result with the

radix point between bits 7 and 8. Any indexed addressing mode referenced

to X, Y, SP, or PC, except indirect modes or 9-bit and 16-bit offset modes,

can be used to identify the first data point (X1,Y1). The second data point is

the next table entry.

TBL

Table Lookup and Interpolate

TBL

CCR Details:

HIN

––––

∆∆

–

∆(1)

1. C-bit was undefined in original M68HC12.

N: Set if MSB of result is set; cleared otherwise

Z: Set if result is $00; cleared otherwise

C: Set if result can be rounded up; cleared otherwise

Source Form

Address

Mode

Object Code

Access Detail

HCS12

M68HC12

TBL oprx0_xysp

IDX

18 3D xb

ORfffP

OrrffffP

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