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HCS12 Datasheet(PDF) 372 Page - Freescale Semiconductor, Inc

Part # HCS12
Description  HCS12 Microcontrollers
PDF  452 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

HCS12 Datasheet(HTML) 372 Page - Freescale Semiconductor, Inc

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S12CPUV2 Reference Manual, Rev. 4.0
372
Freescale Semiconductor
The meaning (reflected in membership function shape and position) of the
labels “close” and “fast” will be different for a teenager than they are for a
grandmother, but both can accomplish the goal of stopping. It makes
intuitive sense that the exact shape of a membership function is much less
important than the fact that it has gradual boundaries.
9.7.2 Rule Evaluation Variations
The REV and REVW instructions expect fuzzy input and fuzzy output values
to be 8-bit values. In a custom fuzzy inference program, higher resolution
may be desirable (although this is not a common requirement). The CPU12
includes variations of minimum and maximum operations that work with the
fuzzy MIN-MAX inference algorithm. The problem with the fuzzy inference
algorithm is that the min and max operations need to store their results
differently, so the min and max instructions must work differently or more
than one variation of these instructions is needed.
The CPU12 has MIN and MAX instructions for 8- or 16-bit operands, where
one operand is in an accumulator and the other is a referenced memory
location. There are separate variations that replace the accumulator or the
memory location with the result. While processing rule antecedents in a
fuzzy inference program, a reference value must be compared to each of
the referenced fuzzy inputs, and the smallest input must end up in an
accumulator. The instruction
EMIND
2,X+
;process one rule antecedent
automates the central operations needed to process rule antecedents. The
E stands for extended, so this instruction compares 16-bit operands. The D
at the end of the mnemonic stands for the D accumulator, which is both the
first operand for the comparison and the destination of the result. The 2,X+
is an indexed addressing specification that says X points to the second
operand for the comparison and it will be post-incremented by 2 to point at
the next rule antecedent.
When processing rule consequents, the operand in the accumulator must
remain constant (in case there is more than one consequent in the rule), and
the result of the comparison must replace the referenced fuzzy output in
RAM. To do this, use the instruction
EMAXM
2,X+
;process one rule consequent
The M at the end of the mnemonic indicates that the result will replace the
referenced memory operand. Again, indexed addressing is used. These two



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