HCS12 datasheet(428/452 Pages) FREESCALE

428 / 452 page

S12CPUV2 Reference Manual, Rev. 4.0

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Freescale Semiconductor

mid-frame position between the locals and the parameters before returning

to the calling program. The CPU12 only requires execution of TFR X,S to

deallocate the local storage and return.

The concept of a frame pointer is supported in the CPU12 through a

combination of improved indexed addressing, universal transfer/exchange,

and the LEA instruction. These instructions work together to achieve more

efficient handling of frame pointers. It is important to consider the complete

instruction set as a complex system with subtle interrelationships rather

than simply examining individual instructions when trying to improve an

instruction set. Adding or removing a single instruction can have

unexpected consequences.

C.4 Increment and Decrement Operators

In C, the notation

+ + i or i – – is often used to form loop counters. Within

limited constraints, the CPU12 loop primitives can be used to speed up the

loop count and branch function.

The CPU12 includes a set of six basic loop control instructions which

decrement, increment, or test a loop count register, and then branch if it is

either equal to zero or not equal to zero. The loop count register can be A,

B, D, X, Y, or SP. A or B could be used if the loop count fits in an 8-bit char

variable; the other choices are all 16-bit registers. The relative offset for the

loop branch is a 9-bit signed value, so these instructions can be used with

loops as long as 256 bytes.

In some cases, the pre- or post-increment operation can be combined with

an indexed instruction to eliminate the cost of the increment operation. This

is typically done by post-compile optimization because the indexed

instruction that could absorb the increment/decrement operation may not be

apparent at compile time.

C.5 Higher Math Functions

In the CPU12, subtle characteristics of higher math operations such as

IDIVS and EMUL are arranged so a compiler can handle inputs and outputs

more efficiently.

The most apparent case is the IDIVS instruction, which divides two 16-bit

signed numbers to produce a 16-bit result. While the same function can be

accomplished with the EDIVS instruction (a 32 by 16 divide), doing so is

HCS12 Datasheet(PDF) 428 Page - Freescale Semiconductor, Inc