MC68HC705P9CS datasheet(83/160 Pages) FREESCALE

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Parallel Input/Output (I/O) Ports

Port A

MC68HC705P9 — Rev. 4.0

Technical Data

MOTOROLA

Parallel Input/Output (I/O) Ports

7.3 Port A

Port A is an 8-bit general-purpose I/O port.

7.3.1 Port A Data Register (PORTA)

The port A data register contains a latch for each of the eight port A pins.

PA[7:0] — Port A Data Bits

These read/write bits are software programmable. Data direction of

each port A pin is under the control of the corresponding bit in data

direction register A. Reset has no effect on port A data.

7.3.2 Data Direction Register A (DDRA)

Data direction register A determines whether each port A pin is an input

or an output.

DDRA[7:0] — Data Direction Register A Bits

These read/write bits control port A data direction. Reset clears

DDRA[7:0], configuring all eight port A pins as inputs.

1 = Corresponding port A pin configured as output

0 = Corresponding port A pin configured as input

$0000

Bit 7

54321

Bit 0

Read:

PA7

PA6

PA5

PA4

PA3

PA2

PA1

PA0

Write:

Reset:

Unaffected by reset

Figure 7-2. Port A Data Register (PORTA)

$0004

Bit 7

54321

Bit 0

Read:

DDRA7

DDRA6

DDRA5

DDRA4

DDRA3

DDRA2

DDRA1

DDRA0

Write:

Reset:

000000

Figure 7-3. Data Direction Register A (DDRA)

Freescale Semiconductor, Inc.

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