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MC68HC705P9CS Datasheet(PDF) 109 Page - Freescale Semiconductor, Inc |
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MC68HC705P9CS Datasheet(HTML) 109 Page - Freescale Semiconductor, Inc |
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109 / 160 page ![]() Timer I/O Registers MC68HC705P9 — Rev. 4.0 Technical Data MOTOROLA Timer 109 9.7.1 Timer Control Register The timer control register (TCR) performs the following functions: • Enables input capture interrupts • Enables output compare interrupts • Enables timer overflow interrupts • Controls the active edge polarity of the TCAP signal • Controls the active level of the TCMP output ICIE — Input Capture Interrupt Enable This read/write bit enables interrupts caused by an active signal on the PD7/TCAP pin. Reset clears the ICIE bit. 1 = Input capture interrupts enabled 0 = Input capture interrupts disabled OCIE — Output Compare Interrupt Enable This read/write bit enables interrupts caused by an active signal on the TCMP pin. Reset clears the OCIE bit. 1 = Output compare interrupts enabled 0 = Output compare interrupts disabled TOIE — Timer Overflow Interrupt Enable This read/write bit enables interrupts caused by a timer overflow. Reset clears the TOIE bit. 1 = Timer overflow interrupts enabled 0 = Timer overflow interrupts disabled $0012 Bit 7 6 54321 Bit 0 Read: ICIE OCIE TOIE 0 0 0 IEDG OLVL Write: Reset: 00 0000 U 0 U = Unaffected Figure 9-10. Timer Control Register (TCR) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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