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KM44C4103C Datasheet(PDF) 7 Page - Samsung semiconductor |
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KM44C4103C Datasheet(HTML) 7 Page - Samsung semiconductor |
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7 / 20 page  CMOS DRAM KM44C4003C, KM44C4103C TEST MODE CYCLE Parameter Symbol -5 -6 Units Notes Min Max Min Max Random read or write cycle time tRC 95 115 ns Read-modify-write cycle time tRWC 138 160 ns Access time from RAS tRAC 55 65 ns 3,4,10,12 Access time from CAS tCAC 18 20 ns 3,4,5,12 Access time from column address tAA 30 35 ns 3,10,12 RAS pulse width tRAS 55 10K 65 10K ns CAS pulse width tCAS 18 10K 20 10K ns RAS hold time tRSH 18 20 ns CAS hold time tCSH 55 65 ns Column address to RAS lead time tRAL 30 35 ns CAS to W delay time tCWD 41 45 ns 7 RAS to W delay time tRWD 78 90 ns 7 Column address to W delay time tAWD 53 60 ns 7 CAS precharge to W delay time tCPWD 58 65 ns 7 Fast Page mode cycle time tPC 40 45 ns Fast Page read-modify-write cycle time tPRWC 81 90 ns RAS pulse width (Fast Page cycle) tRASP 55 200K 65 200K ns Access time from CAS precharge tCPA 35 40 ns 3 OE access time tOEA 18 20 ns OE to data delay tOED 18 20 ns OE command hold time tOEH 18 20 ns ( Note 11 ) |
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