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KM44C4103C Datasheet(PDF) 1 Page - Samsung semiconductor

Part # KM44C4103C
Description  4M x 4Bit CMOS Quad CAS DRAM with Fast Page Mode
PDF  20 Pages
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

KM44C4103C Datasheet(HTML) 1 Page - Samsung semiconductor

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CMOS DRAM
KM44C4003C, KM44C4103C
This is a family of 4,194,304 x 4 bit Quad CAS with Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access
of memory cells within the same row. Refresh cycle (2K Ref. or 4K Ref.), access time (-5 or -6), power consumption(Normal or Low
power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only
refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. Four separate CAS pins provide for
seperate I/O operation allowing this device to operate in parity mode.
This 4Mx4 Fast Page Mode Quad CAS DRAM family is fabricated using Samsung
′s advanced CMOS process to realize high band-
width, low power consumption and high reliability.
• Part Identification
- KM44C4003C/C-L (5V, 4K Ref.)
- KM44C4103C/C-L (5V, 2K Ref.)
• Fast Page Mode operation
• Four seperate CAS pins provide for separate I/O operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• Fast paralleltest mode capability
• TTL compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in Plastic SOJ and TSOP(II) packages
• Single +5V
±10% power supply
Control
Clocks
RAS
CAS0 - 3
W
Vcc
Vss
DQ0
to
DQ3
A0-A11
(A0 - A10) *1
A0 - A9
(A0 - A10) *1
Memory Array
4,194,304 x 4
Cells
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.
4M x 4Bit CMOS Quad CAS DRAM with Fast Page Mode
DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
• Refresh Cycles
Part
NO.
Refresh
cycle
Refresh period
Normal
L-ver
C4003C
4K
64ms
128ms
C4103C
2K
32ms
• Performance Range
Speed
tRAC
tCAC
tRC
tPC
Remark
-5
50ns
13ns
90ns
35ns
5V/3.3V
-6
60ns
15ns
110ns
40ns
5V/3.3V
• Active Power Dissipation
Speed
Refresh Cycle
4K
2K
-5
495
605
-6
440
550
Unit : mW
Data out
Buffer
Data in
Buffer
OE
Note) *1 : 2K Refresh
Col. Address Buffer
Row Address Buffer
Refresh Counter
Refresh Control
Refresh Timer
Column Decoder
Row Decoder
VBB Generator


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