S5T8809

PLL FREQUENCY SYNTHESIZER FOR PAGE

12

FAST LOCK

The Fast lock can gives faster Acquisition time when the S5T8809 starts up. If Fast Lock signal was generated one

time, this circuitry do not operate again even though PLL goes into unlock state.

S5T8809 has two did of Fast lock; one is to control the Loop band width of Loop filter, the other is to control the

charge pump current.

Mode 1

Mode 2

• CP1: Default charge pump output TR

• CP2: When FLC = High, CP2 goes [On] state, the

Timming & Phase is just same as FL signal

• Mode 1 does not used FL pin, only increase PDO

output current same as the width of 1’st phase error

• Exceeding a Loop Band width during Fast Lock

operation

• When the FLC pin set to High level, this function will be

available

Phase

Det.

PDO

Charge

Pump

VCO

Fast

Lock

CP1

CP2

FL Ref. clock

* During CP2 operation,

I pdo = I cp1 + I cp2

Phae

Detector

PDO

Charge

Pump

Fast

Lock

FL Ref. clock

VCO

FL