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PIC18F23K22-E/ML Datasheet(PDF) 319 Page - Microchip Technology |
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PIC18F23K22-E/ML Datasheet(HTML) 319 Page - Microchip Technology |
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319 / 496 page ![]() 2010 Microchip Technology Inc. Preliminary DS41412C-page 319 PIC18(L)F2X/4XK22 The module uses the edge Status bits to control the current source output to external analog modules (such as the A/D Converter). Current is only supplied to external modules when only one (but not both) of the Status bits is set, and shuts current off when both bits are either set or cleared. This allows the CTMU to measure current only during the interval between edges. After both Status bits are set, it is necessary to clear them before another measurement is taken. Both bits should be cleared simultaneously, if possible, to avoid re-enabling the CTMU current source. In addition to being set by the CTMU hardware, the edge Status bits can also be set by software. This is also the user’s application to manually enable or disable the current source. Setting either one (but not both) of the bits enables the current source. Setting or clearing both bits at once disables the source. 19.1.5 INTERRUPTS The CTMU sets its interrupt flag (PIR3<2>) whenever the current source is enabled, then disabled. An interrupt is generated only if the corresponding interrupt enable bit (PIE3<2>) is also set. If edge sequencing is not enabled (i.e., Edge 1 must occur before Edge 2), it is necessary to monitor the edge Status bits and determine which edge occurred last and caused the interrupt. 19.2 CTMU Module Initialization The following sequence is a general guideline used to initialize the CTMU module: 1. Select the current source range using the IRNG bits (CTMUICON<1:0>). 2. Adjust the current source trim using the ITRIM bits (CTMUICON<7:2>). 3. Configure the edge input sources for Edge 1 and Edge 2 by setting the EDG1SEL and EDG2SEL bits (CTMUCONL<3:2 and 6:5>). 4. Configure the input polarities for the edge inputs using the EDG1POL and EDG2POL bits (CTMUCONL<4,7>). The default configuration is for negative edge polarity (high-to-low transitions). 5. Enable edge sequencing using the EDGSEQEN bit (CTMUCONH<2>). By default, edge sequencing is disabled. 6. Select the operating mode (Measurement or Time Delay) with the TGEN bit. The default mode is Time/Capacitance Measurement. 7. Discharge the connected circuit by setting the IDISSEN bit (CTMUCONH<1>); after waiting a sufficient time for the circuit to discharge, clear IDISSEN. 8. Disable the module by clearing the CTMUEN bit (CTMUCONH<7>). 9. Enable the module by setting the CTMUEN bit. 10. Clear the Edge Status bits: EDG2STAT and EDG1STAT (CTMUCONL<1:0>). 11. Enable both edge inputs by setting the EDGEN bit (CTMUCONH<3>). Depending on the type of measurement or pulse generation being performed, one or more additional modules may also need to be initialized and configured with the CTMU module: • Edge Source Generation: In addition to the external edge input pins, both Timer1 and the Output Compare/PWM1 module can be used as edge sources for the CTMU. • Capacitance or Time Measurement: The CTMU module uses the A/D Converter to measure the voltage across a capacitor that is connected to one of the analog input channels. • Pulse Generation: When generating system clock independent output pulses, the CTMU module uses Comparator 2 and the associated comparator voltage reference. |
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