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PCA85232DA Datasheet(PDF) 26 Page - NXP Semiconductors

Part # PCA85232DA
Description  LCD driver for low multiplex rates
PDF  54 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA85232DA Datasheet(HTML) 26 Page - NXP Semiconductors

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PCA85232
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 — 8 December 2010
26 of 54
NXP Semiconductors
PCA85232
LCD driver for low multiplex rates
The acknowledgement after each byte is made only by the (A0 and A1) addressed
PCA85232. After the last (display) byte, the I2C-bus master issues a STOP condition (P).
Alternatively a START may be asserted to RESTART an I2C-bus access.
7.17 Command decoder
The command decoder identifies command bytes that arrive on the I2C-bus. The
commands available to the PCA85232 are defined in Table 9.
[1]
Power-on and reset value.
[2]
The possibility to disable the display allows implementation of blinking under external control; the enable bit
determines also whether the internal clock signal is available at the CLK pin (see Section 7.5.1).
[3]
Not applicable for static drive mode.
[1]
Power-on and reset value.
Table 9.
Definition of PCA85232 commands
Command
Operation code
Reference
Bit
7
6
5
4
3
2
1
0
mode-set
1
1
0
0
E
B
M[1:0]
Table 10
load-data-pointer-MSB
0
0
0
0
P[7:4]
Table 11
load-data-pointer-LSB
0
1
0
0
P[3:0]
Table 12
device-select
1
1
1
0
0
0
A[1:0]
Table 13
bank-select
1
1
1
1
1
0
I
O
Table 14
blink-select
1
1
1
1
0
AB
BF[1:0]
Table 15
frequency-prescaler
1
1
1
0
1
F[2:0]
Table 16
Table 10.
Mode-set command bit description
Bit
Symbol
Value
Description
7 to 4
-
1100
fixed value
3E
display status
0[1]
disabled (blank)[2]
1
enabled
2B
LCD bias configuration[3]
0[1]
1
⁄
3 bias
1
1
⁄
2 bias
1 to 0
M[1:0]
LCD drive mode selection
01
static; BP0
10
1:2 multiplex; BP0, BP1
11
1:3 multiplex; BP0, BP1, BP2
00[1]
1:4 multiplex; BP0, BP1, BP2, BP3
Table 11.
Load-data-pointer-MSB command bit description
Bit
Symbol
Value
Description
7 to 4
-
0000
fixed value
3 to 0
P[7:4]
0000[1] to
1001
P7 to P4 defines the first 4 (most significant) bits of
the data pointer that indicates one of the 160 display
RAM addresses



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