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MPC5604B Datasheet(PDF) 81 Page - Freescale Semiconductor, Inc |
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MPC5604B Datasheet(HTML) 81 Page - Freescale Semiconductor, Inc |
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81 / 106 page ![]() 4.19.2 DSPI characteristics Table 42. DSPI characteristics1 No. Symbol C Parameter DSPI0/DSPI1 DSPI2 Unit Min Typ Max Min Typ Max 1tSCK SR D SCK cycle time Master mode (MTFE = 0) 125 — — 333 — — ns DSlave mode (MTFE = 0) 125 — — 333 — — D Master mode (MTFE = 1) 83 — — 125 — — DSlave mode (MTFE = 1) 83 — — 125 — — —fDSPI SR D DSPI digital controller frequency — — fCPU —— fCPU MHz — t CSC CC D Internal delay between pad associated to SCK and pad associated to CSn in master mode for CSn1->0 Master mode — — 1302 —— 153 ns — t ASC CC D Internal delay between pad associated to SCK and pad associated to CSn in master mode for CSn1->1 Master mode — — 1303 — — 1303 ns 2tCSCext 4 SR D CS to SCK delay Slave mode 32 — — 32 — — ns 3tASCext 5 SR D After SCK delay Slave mode 1/fDSPI + 5 — — 1/fDSPI + 5 — — ns 4tSDC CC D SCK duty cycle Master mode — tSCK/2 — — tSCK/2 — ns SR D Slave mode tSCK/2 — — tSCK/2 — — 5tA SR D Slave access time Slave mode — — 1/fDSPI + 70 — — 1/fDSPI + 130 ns 6tDI SR D Slave SOUT disable time Slave mode 7 — — 7 — — ns 9tSUI SR D Data setup time for inputs Master mode 43 — — 145 — — ns Slave mode 5 — — 5 — — 10 tHI SR D Data hold time for inputs Master mode 0 — — 0 — — ns Slave mode 26 —— 26 —— |
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