MSC8154 datasheet(62/68 Pages) FREESCALE

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MSC8154 Quad-Core Digital Signal Processor Data Sheet, Rev. 2

Hardware Design Considerations

Freescale Semiconductor

3.5.3

RGMII Ethernet Related Pins

Note:

Table 46 and Table 47 assume that the alternate function of the specified pin is not used. If the alternate function is

used, connect the pin as required to support that function.

GE_MDC and GE_MDIO pins should be connected as required by the specified protocol. If neither GE1 nor GE2 is used,

Table 47 lists the recommended management pin connections.

3.5.4

TDM Interface Related Pins

Table 48 lists the board connections of the TDM pins when an entire specific TDM is not used. For multiplexing options that

select a subset of a TDM interface, use the connections described in Table 48 for those signals that are not selected. Table 48

assumes that the alternate function of the specified pin is not used. If the alternate function is used, connect that pin as required

to support the selected function.

SR[1–2]_RXDn

SXCVSS

SR[1–2]_RXDn

SXCVSS

SR[1–2]_TXDn

SR[1–2]_PLL_AVDD

in use

SR[1–2]_PLL_AGND

in use

SXPVSS

in use

SXCVSS

in use

SXPVDD

in use

SXCVDD

in use

Note:

The n indicates the lane number {0,1,2,3} for all unused lanes.

Table 46. Connectivity of RGMII Related Pins When the RGMII Interface Is Not Used

Signal Name

Pin Connection

GE1_RX_CTL

GND

GE2_TX_CTL

Note:

Assuming GE1 and GE2 are disabled in the reset configuration word.

Table 47. Connectivity of GE Management Pins When GE1 and GE2 Are Not Used

Signal Name

Pin Connection

GE_MDC

GE_MDIO

Table 48. Connectivity of TDM Related Pins When TDM Interface Is Not Used

Signal Name

Pin Connection

TDMnRCLK

GND

TDMnRDAT

GND

TDMnRSYN

GND

Table 45. Connectivity of HSSI Related Pins When Specific Lane Is Not Used (continued)

Signal Name

Pin Connection

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