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L6460 Datasheet(PDF) 62 Page - STMicroelectronics |
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L6460 Datasheet(HTML) 62 Page - STMicroelectronics |
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62 / 139 page  Power bridges L6460 62/139 Doc ID 17713 Rev 1 Figure 17. Half bridge configuration In this case each half bridge will behave according to the following truth table. Note: When “low power mode” bit is active the bridges will reduce its biasing thus contributing to the power saving. When a current limit event occurs this event will be latched and the bridges will remain in high impedance state for the off time. Table 19. Half bridge truth table TSD nReset Low power mode Enable Current limit MtrXCtrl SideA/B PWM OUT 1 XXX XXX Z 0 0 XX XXX Z 011 X X X X Z 010 0 X X X Z 010 100 0 Z 010 100 10 010 101 0 Z 010 101 11 010 11 X X Z High side Driver Low side Driver Control Logic DCX Phase output VSupply Vpump Control Signals From SPI |
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