CYWUSB6953_10 datasheet(13/68 Pages) CYPRESS

13 / 68 page

CYRF69103

Document #: 001-07611 Rev *F

Page 13 of 68

11. CPU Registers

11.1 Flags Register

The Flags Register can only be set or reset with logical instruction.

11.2 Accumulator Register

Table 11-1. CPU Flags Register (CPU_F) [R/W]

Bit #

Field

Reserved

XIO

Super

Carry

Zero

Global IE

Read/Write

–

R/W

Default

00000010

Bits 7:5

Reserved

Bit 4

XIO

Set by the user to select between the register banks.

0 = Bank 0

1 = Bank 1

Bit 3

Super

Indicates whether the CPU is executing user code or Supervisor Code (This code cannot be accessed directly by

the user).

0 = User Code

1 = Supervisor Code

Bit 2

Carry

Set by CPU to indicate whether there has been a carry in the previous logical/arithmetic operation.

0 = No Carry

1 = Carry

Bit 1

Zero

Set by CPU to indicate whether there has been a zero result in the previous logical/arithmetic operation.

0 = Not Equal to Zero

1 = Equal to Zero

Bit 0

Global IE

Determines whether all interrupts are enabled or disabled.

0 = Disabled

1 = Enabled

Note This register is readable with explicit address 0xF7. The OR F, expr and AND F, expr must be used to set and clear the

CPU_F bits.

Table 11-2. CPU Accumulator Register (CPU_A)

Bit #

Field

CPU Accumulator [7:0]

Read/Write

––––––––

Default

00000000

Bits 7:0

CPU Accumulator [7:0]

8-bit data value holds the result of any logical/arithmetic instruction that uses a source addressing mode.

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