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IMX53CEC Datasheet(PDF) 33 Page - Freescale Semiconductor, Inc

Part # IMX53CEC
Description  Applications Processors for Consumer Products
PDF  204 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

IMX53CEC Datasheet(HTML) 33 Page - Freescale Semiconductor, Inc

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Electrical Characteristics
i.MX53xD Applications Processors for Consumer Products, Rev. 2
Freescale Semiconductor
33
4.3.3
Low Voltage I/O (LVIO) DC Parameters
The parameters in Table 15 are guaranteed per the operating ranges in Table 7, unless otherwise noted.
The LVIO pads operate only as inputs.
3 The single-ended signals need to be within the respective limits (Vih(dc) max, Vil(dc) min) for single-ended signals as well as
the limitations for overshoot and undershoot.
4 Use an off-chip pull resistor of less than 60 k
Ω to override this keeper.
Table 15. LVIO DC Electrical Characteristics
DC Electrical Characteristics
Symbol
Test Conditions
Min
Typ
Max
Unit
High-Level DC input voltage1, 2
1 Overshoot and undershoot conditions (transitions above OVDD and below GND) on switching pads must be held below 0.6 V,
and the duration of the overshoot/undershoot must not exceed 10% of the system clock cycle. Overshoot/undershoot must be
controlled through printed circuit board layout, transmission line impedance matching, signal line termination, or other
methods. Non-compliance to this specification may affect device reliability or cause permanent damage to the device.
2 To maintain a valid level, the transition edge of the input must sustain a constant slew rate (monotonic) from the current DC
level through to the target DC level, VIL or VIH. Monotonic input transition time is from 0.1 ns to 1 s. VIL and VIH do not apply
when hysteresis is enabled.
Vih
—
0.7
× OVDD
—
OVDD
V
Low-Level DC input voltage1, 2
Vil
—
0
—
0.3
× OVDD
V
Input Hysteresis
Vhys
OVDD = 1.875 V
OVDD = 2.775 V
0.35
0.62
1.27
—V
Schmitt trigger VT+2, 3
3 Hysteresis of 350 mV is guaranteed over all operating conditions when hysteresis is enabled.
VT+
—
0.5
× OVDD
—
—
V
Schmitt trigger VT–2, 3
VT–
—
—
—
0.5
× OVDD
V
Input current (no pull-up/down)
Iin
Vin = OVDD or 0 V
—
—
1
μA
Input current (22 k
Ω Pull-up)
Iin
Vin = 0 V
Vin = OVDD
—
—
161
1
μA
Input current (47 k
Ω Pull-up)
Iin
Vin = 0 V
Vin = OVDD
——
76
1
μA
Input current (100 k
Ω Pull-up)
Iin
Vin = 0 V
Vin = OVDD
——
36
1
μA
Input current (100 k
Ω Pull-down)
Iin
Vin = 0 V
Vin = OVDD
——
1
36
μA
Keeper Circuit Resistance
—
—
1304
4 Use an off-chip pull resistor of less than 60 k
Ω to override this keeper.
—k
Ω



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