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IMX53CEC Datasheet(PDF) 185 Page - Freescale Semiconductor, Inc |
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IMX53CEC Datasheet(HTML) 185 Page - Freescale Semiconductor, Inc |
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185 / 204 page  Package Information and Contact Assignments i.MX53xD Applications Processors for Consumer Products, Rev. 2 Freescale Semiconductor 185 EIM_A23 B3 — NVCC_EIM_MAIN UHVIO ALT0 emi_EIM_A[23] Output — EIM_A24 A4 — NVCC_EIM_MAIN UHVIO ALT0 emi_EIM_A[24] Output — EIM_A25 A3 — NVCC_EIM_MAIN UHVIO ALT0 emi_EIM_A[25] Output — EIM_BCLK F11 — NVCC_EIM_MAIN UHVIO ALT0 emi_EIM_BCLK Output — EIM_CS0 G10 — NVCC_EIM_MAIN UHVIO ALT0 emi_EIM_CS[0] Output — EIM_CS1 C4 — NVCC_EIM_MAIN UHVIO ALT0 emi_EIM_CS[1] Output — EIM_D16 H1 — NVCC_EIM_SEC UHVIO ALT1 gpio3_GPIO[16] Input 100 K Ω PU EIM_D17 G3 — NVCC_EIM_SEC UHVIO ALT1 gpio3_GPIO[17] Input 100 K Ω PU EIM_D18 H2 — NVCC_EIM_SEC UHVIO ALT1 gpio3_GPIO[18] Input 100 K Ω PU EIM_D19 G2 — NVCC_EIM_SEC UHVIO ALT1 gpio3_GPIO[19] Input 100 K Ω PU EIM_D20 M7 — NVCC_EIM_SEC UHVIO ALT1 gpio3_GPIO[20] Input 100 K Ω PU EIM_D21 H6 — NVCC_EIM_SEC UHVIO ALT1 gpio3_GPIO[21] Input 100 K Ω PU EIM_D22 G1 — NVCC_EIM_SEC UHVIO ALT1 gpio3_GPIO[22] Input 360 K Ω PD EIM_D23 F1 — NVCC_EIM_SEC UHVIO ALT1 gpio3_GPIO[23] Input 100 K Ω PU EIM_D24 F9 — NVCC_EIM_SEC UHVIO ALT1 gpio3_GPIO[24] Input 100 K Ω PU EIM_D25 E1 — NVCC_EIM_SEC UHVIO ALT1 gpio3_GPIO[25] Input 100 K Ω PU EIM_D26 D1 — NVCC_EIM_SEC UHVIO ALT1 gpio3_GPIO[26] Input 100 K Ω PU EIM_D27 C10 — NVCC_EIM_SEC UHVIO ALT1 gpio3_GPIO[27] Input 100 K Ω PU EIM_D28 D2 — NVCC_EIM_SEC UHVIO ALT1 gpio3_GPIO[28] Input 100 K Ω PU EIM_D29 C7 — NVCC_EIM_SEC UHVIO ALT1 gpio3_GPIO[29] Input 100 K Ω PU EIM_D30 C1 — NVCC_EIM_SEC UHVIO ALT1 gpio3_GPIO[30] Input 100 K Ω PU EIM_D31 F7 — NVCC_EIM_SEC UHVIO ALT1 gpio3_GPIO[31] Input 360 K Ω PD EIM_DA0 K1 — NVCC_EIM_MAIN UHVIO ALT0 emi_NAND_EIM_D A[0] Input2 100 K Ω PU EIM_DA1 G11 — NVCC_EIM_MAIN UHVIO ALT0 emi_NAND_EIM_D A[1] Input2 100 K Ω PU EIM_DA10 L7 — NVCC_EIM_MAIN UHVIO ALT0 emi_NAND_EIM_D A[10] Input2 100 K Ω PU EIM_DA11 K7 — NVCC_EIM_MAIN UHVIO ALT0 emi_NAND_EIM_D A[11] Input 100 K Ω PU EIM_DA12 E2 D1 NVCC_EIM_MAIN UHVIO ALT0 emi_NAND_EIM_D A[12] Input 100 K Ω PU Table 118. PoP 12 x 12 mm Signal Assignments, Power Rails, and I/O (continued) Contact Name Power Rail I/O Buffer Type Out of Reset Condition1 Alt. Mode Function Direct ion Config./ Value |
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