PCA9663 datasheet(21/66 Pages) NXP

21 / 66 page

PCA9663

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Product data sheet

Rev. 1 — 6 June 2011

21 of 66

NXP Semiconductors

PCA9663

Parallel bus to 3 channel Fm+ I2C-bus controller

7.5.1.6

TRANCONFIG — Transaction configuration register

The TRANCONFIG register is an 8-bit

 65 register set that makes up a table that

contains the number of transactions that will be executed in a sequence and the number

of data bytes involved in the transaction.

The first byte of the register is the Transaction Count register. The remaining 64 registers

are the Transaction Length registers.

Remark: Even if the Transaction length (TRANCONFIG[1:40h]) and the

SLATABLE([0:3Fh]) are fully initialized, only the specified number of transactions in the

Transaction count (TRANCONFIG[0]) will be part of the sequence.

If the Transaction count is 0, then there will be no activity on the serial bus if the STA bit is

set. In addition, there will be no interrupts generated or status updated. The controller will

simply reset the CONTROL.STA bit without performing any transactions.

If the Transaction length is 0, a read transaction will be skipped and a write transaction will

send the slave address plus write bit (SLA+W) on the serial bus with no data bytes.

7.5.1.7

DATA — I2C-bus Data register

DATA is an 8-bit read/write, auto-increment register. It is the interface port to the channel

buffer. When accessing the buffer, the host writes a byte of serial data to be transmitted or

reads bytes that have just been received at this location. The host can read from the

DATA at any time and can only write to this 8-bit register while the channel is idle.

Remark: Reading the DATA when the serial interface is active may return outdated or

erroneous data.

The host can read or write data up to the amount of memory space allotted to the channel.

The location at which the data is accessed is stored in the TRANSEL and TRANOFS

Table 12.

TRANCONFIG, byte 0 - Transaction configuration register bit description

Address: Channel 0 = C4h; Channel 1 = D4h; Channel 2 = E4h.

Bit

Symbol

Description

7:0

Number of transactions in the sequence. Maximum is 40h.

Table 13.

TRANCONFIG, byte 1 to 40h - Transaction configuration register bit description

Bit

Symbol

Description

7:0

Number of bytes per transaction in the sequence. Maximum is FFh.

Table 14.

Example of TRANCONFIG register loaded

Value

Description

Transaction count

10h

16 transactions = 16 slave addresses in the SLATABLE

Transaction length 00h

0Ah

10 byte transaction

Transaction length 01h

12h

18 byte transaction

Transaction length 02h

28h

40 byte transaction

Transaction length 03h

40h

64 byte transaction

Transaction length 3Fh

12h

18 byte transaction

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