CDCUN1208LP datasheet(31/43 Pages) TI

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SDA

SCL

SDA Stable,

Data Valid

SDA State

Change

Permitted

STOP

SDA

SCL

START

MESSAGE BODY

CDCUN1208LP

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SCAS928 – MAY 2012

2C Communication

The CDCUN1208LP incorporates an I2C port compliant with I2C Bus Specification V2.1 (7-bit addressing). Some

highlights are contained herein to provide clarity with respect to how communication between the host and the

CDCUN1208LP is facilitated. The I2C bus comprises two signals (clock – SCL, and data – SDA). I2C implements

a master-slave protocol and supports multi-master implementations. Unlike SPI that implements a chip select

signal for device level addressing and separate data signals for transmit and receive, I2C embeds the device

address in the serial data stream. Because of this, devices that reside on the I2C must have a unique bus

address. I2C also uses the protocol to control the direction of data flow through the data signaling line.

Message Transmission

Data and Address Bits

When transmitting address or data bits, the transmitter must only change the state of SDA when SCL is low.

During the time that SCL is high, SDA must be stable (no transitions).

Figure 35. I2C Data/Address Bit Transmission

Special Symbols – Start (S) and Stop (P)

Messages are framed by the master by generating a START and a STOP symbol. The START symbol is

signaled by transitioning the SDA line from high to low while the SCL line is high. The STOP symbol is signaled

by transitioning the SDA line from low to high while the SCL line is high.

Figure 36. I2C Bus START and STOP Symbol Generation

Special Symbols – Acknowledge (ACK)

The acknowledge symbol must be sent by the receiver during the 9th clock cycle after the transmitter sends a

byte of data. The transmitter allows the SDA pin to go high and the receiver pulls the line low to acknowledge the

receipt of the byte (leaving the SDA high indicates that the byte was not received). If this occurs the transmitter

issues a STOP and retransmits the message. If the receiver is not prepared to receive another byte, it can

suspend transmission by holding the SDA line low during the ACK time slot. When the receiver is ready to

receive another byte, it releases the SDA line.

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