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CDCUN1208LP Datasheet(PDF) 27 Page - Texas Instruments |
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CDCUN1208LP Datasheet(HTML) 27 Page - Texas Instruments |
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27 / 43 page ![]() CDCUN1208LP www.ti.com SCAS928 – MAY 2012 DEVICE REGISTERS Device Registers: Register 00-07 Register 00: OUT1 Register 01: OUT2 Register 02: OUT3 Register 03: OUT4 Register 04: OUT5 Register 05: OUT6 Register 06: OUT7 Register 07: OUT8 Table 10. CDCUN1208LP Register 0–7 Bit Definitions RAM BIT BIT NAME RELATED BLOCK DESCRIPTION / FUNCTION POWER UP CONDITION 15 14 13 TI RESERVED TI RESERVED 12 11 OUTx CMOS MODE 10 OUTx_CMOS_MODE 1 – both sides pseudo differential 0 0 – both sides in phase 9 OUTx Edge Rate Control 0 111 – Medium 8 0 OUTx_ERC[2:0] 100 - Fast 7 0 000 - Slow 6 0 TI RESERVED TI RESERVED 5 0 OUTx Output Enable Reg 00: OUT1 OTTP = LVCMOS Reg 01: OUT2 11 – OUT1P: ON | OUT1N: ON Reg 02: OUT3 4 0 10 – OUT1P: ON |OUT1N: OFF Reg 03: OUT4 01 – OUT1P: OFF| OUT1N: ON Reg 04: OUT5 OUTx_OE[1:0] 00 – OUT1P: OFF| OUT1N: OFF Reg 05: OUT6 Reg 06: OUT7 OTTP = Differential (LVDS, HCSL) Reg 08: OUT8 3 0 00 – OFF 11 - ON 2 OUTx Output Type 0 11 – HCSL OUTx_OTTP[1:0] 10 – Reserved 1 0 01 – LVCMOS 00 - LVDS OUTx Buffer 0 OUTx_PD 1 – Disabled 0 0 - Enabled Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 27 Product Folder Link(s) :CDCUN1208LP |
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