PC33814AE datasheet(44/50 Pages) FREESCALE

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Analog Integrated Circuit Device Data



Freescale Semiconductor

33814

Typical Applications

6.0.1

Output OFF Open Load Fault

An Output OFF Open Load Fault is the detection and reporting of an open load when the corresponding output is disabled (input

bit programmed to a logic low state). The Output OFF Open Load Fault is detected by comparing the drain-to-source voltage of

the specific MOSFET output to an internally generated reference. Each output has one dedicated comparator for this purpose.

Each output has an internal pull-down current source or resistor. The pull-down current sources are enabled on power-up and

must be enabled for Open Load Detect to function. In cases were the Open Load Detect current is disabled, the status bit will

always respond with logic 0. The device will only shut down the pull-down current in Sleep mode or when disabled via the SPI.

During output switching, especially with capacitive loads, a false Output OFF Open Load Fault may be triggered. To prevent this

false fault from being reported, an internal fault filter of 100 to 450 µs is incorporated. The duration for which a false fault may be

reported is a function of the load impedance, RDS(ON), COUT of the MOSFET, as well as the supply voltage, VPWR. The rising edge

of CSB triggers the built-in fault delay timer. The timer must time out before the fault comparator is enabled to detect a faulted

threshold. Once the condition causing the Open Load Fault is removed, the device resumes normal operation. The Open Load

Fault, however, will be latched in the output SO Response register for the MCU to read.

6.0.2

Low Voltage Operation

Low voltage condition (6.5 V< VPWR <9.0 V) will operate per the command word, however parameter tables may be out of

specification and status reported on SO pin is not guaranteed.

6.0.3

Low Side Injector Driver Voltage Clamp

Each Injector output of the 33814 incorporates an internal voltage clamp to provide fast turn-OFF and transient protection. Each

clamp independently limits the drain-to-source voltage to VCL. The total energy clamped (EJ) can be calculated by multiplying the

current area under the current curve (IA) times the clamp voltage (VCL) (see Figure 12).

Characterization of the output clamps, using a repetitive pulse method at 1.0 A, indicates the maximum energy to be 100 mJ at

125

C junction temperature per output.

Figure 12. Output Voltage Clamping

6.0.4

Reverse Battery Protection

The 33814 device requires external reverse battery protection on the VPWR pin.

All outputs consist of a power MOSFET with an integral substrate diode. During a reverse battery condition, current will flow

through the load via the substrate diode. Under this condition load devices will turn on. If load reverse battery protection is

desired, a diode must be placed in series with the load.

Current

Area (IA )

Clamp Energy

J = IA x VCL )

Drain Voltage

Time

Drain-to-Source C lamp

Voltage (VCL = 45 V)

Drain Current

D = 0.3 A)

GND

Drain-to-Source ON

Voltage (VDS(O N))

50 V)

Drain-to-Source Clamp

Voltage (VCL = 50 V)

Drain-to-Source ON

Voltage (VDS(ON))

Drain Voltage

Clamp Energy

(EJ = IA x VCL)

GND

Time

Drain Current

(ID = 0.3 A)

PC33814AE Datasheet(PDF) 44 Page - Freescale Semiconductor, Inc

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