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SPC560B64L5 Datasheet(PDF) 68 Page - STMicroelectronics |
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SPC560B64L5 Datasheet(HTML) 68 Page - STMicroelectronics |
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68 / 134 page  Electrical characteristics SPC560B54/6x 68/134 Doc ID 15131 Rev 6 4.6.4 Output pin transition times VOL CC P Output low level FAST configuration Push Pull IOL = 14 mA, VDD = 5.0 V ± 10%, PAD3V5V = 0 (recommended) —— 0.1VDD V C IOL = 7 mA, VDD = 5.0 V ± 10%, PAD3V5V = 1 (2) —— 0.1VDD C IOL = 11 mA, VDD = 3.3 V ± 10%, PAD3V5V = 1 (recommended) —— 0.5 1. VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = −40 to 125 °C, unless otherwise specified 2. The configuration PAD3V5 = 1 when VDD = 5 V is only a transient configuration during power-up. All pads but RESET and Nexus output (MDOx, EVTO, MCKO) are configured in input or in high impedance state. Table 20. FAST configuration output buffer electrical characteristics (continued) Symbol C Parameter Conditions(1) Value Unit Min Typ Max Table 21. Output pin transition times Symbol C Parameter Conditions(1) Value Unit Min Typ Max Ttr CC D Output transition time output pin(2) SLOW configuration CL = 25 pF VDD = 5.0 V ± 10%, PAD3V5V = 0 —— 50 ns TCL = 50 pF — — 100 DCL = 100 pF — — 125 DCL = 25 pF VDD = 3.3 V ± 10%, PAD3V5V = 1 —— 50 TCL = 50 pF — — 100 DCL = 100 pF — — 125 Ttr CC D Output transition time output pin(2) MEDIUM configuration CL = 25 pF VDD = 5.0 V ± 10%, PAD3V5V = 0 SIUL.PCRx.SRC = 1 —— 10 ns TCL = 50 pF — — 20 DCL = 100 pF — — 40 DCL = 25 pF VDD = 3.3 V ± 10%, PAD3V5V = 1 SIUL.PCRx.SRC = 1 —— 12 TCL = 50 pF — — 25 DCL = 100 pF — — 40 Ttr CC D Output transition time output pin(2) FAST configuration CL = 25 pF VDD = 5.0 V ± 10%, PAD3V5V = 0 —— 4 ns CL = 50 pF — — 6 CL = 100 pF — — 12 CL = 25 pF VDD = 3.3 V ± 10%, PAD3V5V = 1 —— 4 CL = 50 pF — — 7 CL = 100 pF — — 12 1. VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = −40 to 125 °C, unless otherwise specified 2. CL includes device and package capacitances (CPKG < 5 pF). |
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