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SPC560B64L5 Datasheet(PDF) 85 Page - STMicroelectronics |
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SPC560B64L5 Datasheet(HTML) 85 Page - STMicroelectronics |
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85 / 134 page ![]() SPC560B54/6x Electrical characteristics Doc ID 15131 Rev 6 85/134 IDDSTDBY2 CC P STANDBY2 mode current(9) Slow internal RC oscillator (128 kHz) running TA = 25 °C — 30 100 µA DTA =55 °C — 75 — DTA = 85 °C — 180 700 DTA = 105 °C — 315 1000 PTA = 125 °C — 560 1700 IDDSTDBY1 CC T STANDBY1 mode current(10) Slow internal RC oscillator (128 kHz) running TA =25 °C — 20 60 µA DTA =55 °C — 45 — DTA = 85 °C — 100 350 DTA = 105 °C — 165 500 DTA = 125 °C — 280 900 1. VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = −40 to 125 °C, unless otherwise specified 2. Running consumption does not include I/Os toggling which is highly dependent on the application. The given value is thought to be a worst case value with all peripherals running, and code fetched from code flash while modify operation ongoing on data flash. Notice that this value can be significantly reduced by application: switch off not used peripherals (default), reduce peripheral frequency through internal prescaler, fetch from RAM most used functions, use low power mode when possible. 3. Higher current may be sunk by device during power-up and standby exit. Please refer to in-rush average current in Table 26. 4. RUN current measured with typical application with accesses on both Flash and RAM. 5. Only for the “P” classification: Data and Code Flash in Normal Power. Code fetched from RAM: Serial IPs CAN and LIN in loop back mode, DSPI as Master, PLL as system clock (4 x Multiplier) peripherals on (eMIOS/CTU/ADC) and running at max frequency, periodic SW/WDG timer reset enabled. 6. Data Flash Power Down. Code Flash in Low Power. SIRC 128 kHz and FIRC 16 MHz on. 10 MHz XTAL clock. FlexCAN: instances: 0, 1, 2 ON (clocked but not reception or transmission), instances: 4, 5, 6 clocks gated. LINFlex: instances: 0, 1, 2 ON (clocked but not reception or transmission), instance: 3 to 9 clocks gated. eMIOS: instance: 0 ON (16 channels on PA[0]–PA[11] and PC[12]–PC[15]) with PWM 20 kHz, instance: 1 clock gated. DSPI: instance: 0 (clocked but no communication), instance: 1 to 5 clocks gated. RTC/API ON. PIT ON. STM ON. ADC1 OFF. ADC0 ON but no conversion except two analog watchdogs. 7. Only for the “P” classification: No clock, FIRC 16 MHz off, SIRC 128 kHz on, PLL off, HPvreg off, ULPVreg/LPVreg on. All possible peripherals off and clock gated. Flash in power down mode. 8. When going from RUN to STOP mode and the core consumption is > 6 mA, it is normal operation for the main regulator module to be kept on by the on-chip current monitoring circuit. This is most likely to occur with junction temperatures exceeding 125 °C and under these circumstances, it is possible for the current to initially exceed the maximum STOP specification by up to 2 mA. After entering stop, the application junction temperature will reduce to the ambient level and the main regulator will be automatically switched off when the load current is below 6 mA. 9. Only for the “P” classification: ULPreg on, HP/LPVreg off, 32 KB RAM on, device configured for minimum consumption, all possible modules switched off. 10. ULPreg on, HP/LPVreg off, 8 KB RAM on, device configured for minimum consumption, all possible modules switched off. Table 28. Power consumption on VDD_BV and VDD_HV (continued) Symbol C Parameter Conditions(1) Value Unit Min Typ Max |
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