SPC564L54L5 datasheet(151/160 Pages) STMICROELECTRONICS

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SPC56XL60/54

Revision history

Doc ID 15457 Rev 8

151/160

14-Jun-2010

(continued)

In the “Main oscillator electrical characteristics” table, changed the maximum

specification for gmXOSCHS (was 11 mA/V, is 11.8 mA/V).

Revised the “ADC electrical characteristics” section.In the “ADC conversion

characteristics” table:

– Changed the tADC_S specification (was TBD, is minimum of 383 ns).

– Added the footnote “No missing codes” to the DNL specification.

– Added specifications for SNR, THD, SINAD, and ENOB.

Revised the “Ordering information” section.

23-Nov-2010

Editorial changes and improvements.

Revised the Overview section.

Replaced references to PowerPC with references to Power Architecture.

In the feature summary, changed “As much as 128 KB on-chip SRAM” to

“128 KB on-chip SRAM”.

In the “Feature details” section:

– In the “On-chip SRAM with ECC” section, added information about required

RAM wait states.

– In the PIT section, deleted “32-bit counter for real time interrupt, clocked from

main external oscillator” (not supported on this device).

– In the flash-memory section, changed “16 KB Test” to “16 KB test sector”,

revised the wait state information, and deleted the associated Review_Q&A

content.

– In the SRAM section, revised the wait state information.

In the 100-pin pinout diagram:

– Renamed pin 41 (was VDD_HV_ADV0_ADV1, is VDD_HV_ADV).

– Renamed pin 42 (was VSS_HV_ADV0_ADV1, is VSS_HV_ADV).

In the 144-pin pinout diagram:

– Renamed pin 58 (was VDD_HV_ADV0_ADV1, is VDD_HV_ADV).

– Renamed pin 59 (was VSS_HV_ADV0_ADV1, is VSS_HV_ADV).

Added the “LQFP100 pin function summary” table.

In the “LQFP144 pin function summary” table, for pin 39, changed VSS_LV_COR

to VDD_LV_COR.

In the “Supply pins” table:

– Changed the description for VDD_LV_COR (was “Voltage regulator supply

voltage”, is “Core logic supply”).

– Changed the description for VDD_HV_PMU (was “Core regulator supply”, is

“Voltage regulator supply”).

In the “Pin muxing” table:

– In the “Pad speed” column headings, changed “SRC = 0” to “SRC = 1” and

“SRC = 1” to “SRC = 0”

– For port B[6], changed the pad speed for SRC=0 (was M, is F).

In the “Thermal characteristics” section, added meaningful values to the

thermal-characteristics tables.

Added the “SWG electrical specifications” section.

In the “Voltage regulator electrical characteristics” section, changed the table

title (was “HPREG1, HPREG2, Main LVDs, Digital HVD, and Digital LVD

electrical specifications”, is “Voltage regulator electrical characteristics”) and

revised the table.

Table 44.

Document revision history (continued)

Date

Revision

Changes

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