CXP87452 datasheet(16/32 Pages) SONY

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CXP87452/87460

VDD = 3.0V, IOH = –0.15mA

VDD = 3.0V, IOH = –0.5mA

VDD = 3.0V, IOL = 1.2mA

VDD = 3.0V, IOL = 1.6mA

VDD = 3.0V, IOL = 5.0mA

VDD = 3.6V, VIH = 3.6V

VDD = 3.6V, VIL = 0.3V

VDD = 3.6V, VIL =0.3V

High level

output voltage

2.7

2.3

0.3

–0.3

–0.9

µA

PD, PH

EXTAL

RST∗2

Item

Symbol

Condition

Min.

Clock 1MHz

0V other than the measured pins

VDD

IDD2

IIZ

IDDS2

IDDS3

CIN

VOH

VOL

IIHE

IILE

IILR

Low level

output voltage

Input current

Typ.

0.3

0.5

1.0

–20

–200

±10

Max.

Unit

Supply voltage (VDD) 3.0 to 3.6V

(Ta = –20 to +75°C, Vss = 0V)

∗1 RST pin specifies only where the power on reset circuit has been selected with mask option.

∗2 RST pin specifies the input current when the pull-up resistor is selected, and specifies leakage current

when non-resistance is selected.

∗3 When entire output pins are open.

∗4 When setting upper 2 bits (CPU clock selection) of clock control register CLC (address: 00FE

) to "00" and

operating in high speed mode (1/2 dividing clock).

VDD = 3.3V ± 0.3V∗4

SLEEP mode

VDD = 3.3V ± 0.3V

VDD = 5.5V

Supply

current∗3

Input capacity

VDD = 5.5V,

VI = 0, 5.5V

Crystal oscillation

(C1 = C2 = 15pF) of 12MHz

STOP mode

I/O leakage

current

PA to PK,

MP,

AN0 to AN3,

CS, SI, SO,

SCK, RST∗2

0.8

2.5

µA

PA to PE,

PF4 to PF7,

PH (VOL only)

PI1 to PI7, PJ,

SO, SCK, RST∗1

(VOL only)

Other than VDD,

Vss, AVDD, and

AVss pins

CXP87452 Datasheet(PDF) 16 Page - Sony Corporation

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