WM9093ECSSLASHR datasheet(50/84 Pages) WOLFSON

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WM9093

Production Data

PD, March 2012, Rev 4.2

DC SERVO

The WM9093 provides a DC servo circuit on the headphone outputs HPOUT1L and HPOUT1R in

order to remove DC offset from these ground-referenced outputs. When enabled, the DC servo

ensures that the DC level of these outputs remains within 1mV of ground. Removal of the DC offset is

important because any deviation from GND at the output pin will cause current to flow through the

load under quiescent conditions, resulting in increased power consumption. Additionally, the presence

of DC offsets can result in audible pops and clicks at power up and power down.

The recommended usage of the DC Servo is initialised by running the default Start-Up sequence as

described in the “Control Write Sequencer” section. The default Start-Up sequence executes a series

of DC offset corrections, after which the measured offset correction is maintained on the headphone

output channels. If a different usage is required, eg. If a periodic DC offset correction is required, then

the default Start-Up sequence may be modified according to specific requirements. The relevant

control fields are described in the following paragraphs and are defined in Table 28.

DC SERVO ENABLE AND START-UP

The DC Servo circuit is enabled on HPOUT1L and HPOUT1R by setting DCS_ENA_CHAN_0 and

DCS_ENA_CHAN_1 respectively. When the DC Servo is enabled, the DC offset correction can be

commanded in a number of different ways, including single-shot and periodically recurring events.

Writing a logic 1 to DCS_TRIG_STARTUP_n initiates a series of DC offset measurements and

applies the necessary correction to the associated output; (‘n’ = 0 for Left channel, 1 for Right

channel). On completion, the headphone output will be within 1mV of AGND. This is the DC Servo

mode selected by the default Start-Up sequence. Completion of the DC offset correction triggered in

this way is indicated by the DCS_STARTUP_COMPLETE field, as described in Table 28. Typically,

this operation takes 25ms per channel.

Writing a logic 1 to DCS_TRIG_DAC_WR_n causes the DC offset correction to be set to the value

contained in the DCS_DAC_WR_VAL_n fields in Register R87. This mode is useful if the required

offset

correction

has

already

been

determined

and

stored;

faster

than

the

DCS_TRIG_STARTUP_n mode, but relies on the accuracy of the stored settings. Completion of the

DC offset correction triggered in this way is indicated by the DCS_DAC_WR_COMPLETE field, as

described in Table 28. Typically, this operation takes 2ms per channel.

When using either of the DC Servo options above, the status of the DC offset correction process is

indicated

the

DCS_CAL_COMPLETE

field;

this

the

logical

the

DCS_STARTUP_COMPLETE and DCS_DAC_WR_COMPLETE fields.

The DC Servo control fields associated with start-up operation are described in Table 28. It is

important to note that, to minimise audible pops/clicks, the Start-Up and DAC Write modes of DC

Servo operation should be commanded as part of a control sequence which includes muting and

shorting of the headphone outputs; a suitable sequence is defined in the default Start-Up sequence.

WM9093ECS/R Datasheet(PDF) 50 Page - Wolfson Microelectronics plc

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