KTPF0100UG datasheet(19/74 Pages) FREESCALE

19 / 74 page

KTPF0100UG, Rev. 2.0

Freescale Semiconductor

Hardware Description

The KITPF0100EPEVBE operates with a single power supply from 3.1 to 4.5 V and is controlled via USB with help

of an integrated USB-I2C communication bridge. By applying the input voltage supply, the KITPF0100EPEVBE will

power up according to the default power-up sequence described in the PF0100 datasheet. Furthermore, for

controlling the PF0100 device or programming the OTP registers, refer to section Graphical User Interface

Description for a detailed description of the KITPF0100GUI software.

Important notice: If power-up sequences and configuration are to be modified, the user must ensure that the

where the quantity, size, and value of the inductors depend on the configuration (single/dual phase or independent

mode) and the switching frequency. Additionally, if an LDO is powered by a buck regulator, it will be gated by the

buck regulator in the start-up sequence. Refer to the MMPF0100 Datasheet for details on buck regulator setup.

9.1

Jumper Description

Table 1. KITPF0100EPEVBE jumper description

Jumper

Default

Description

J1 - J7

Closed

Buck regulators input power path isolation.

Short these jumpers to allow SWxIN to be powered from the SWVIN supply.

Closed

SWBST regulator input power path isolation.

Short this jumper to allow SWBSTIN to be powered from the SWVIN supply.

J17

5-6

VDDOTP Supply selector

• 1-2: Connect VDDOTP to the OTP Boost output (VDDOTPIN) for OTP programming.

• 3-4: Connect VDDOTP to GND to power up from OTP/TBB sequence.

• 5-6: Connect VDDOTP to VCOREDIG to power up from Default Power up sequence.

J20

1-2

Coin cell selector.

• 1-2: Enables BAT1 as the main coin cell supply.

• 2-3: Enables BAT2 as the main coin cell supply.

J40

Closed

Shorts PVIN and SWVIN. Allows supply isolation to provide more accurate efficiency

readings on the switching supplies.

J41

Open

Shorts SWVIN to VIN. Allows one to isolate or connect the PF0100 logic input supply to

SWVIN net. (debugging option)

J27

Closed

Shorts PVIN to VIN. Allows one to isolate or connect the PF0100 logic input supply to

PVIN net. (debugging option)

J22

2-3

PF0100 input logic supply selector.

• 1-2: Connects PF0100 VIN terminal to the 3.3V external LDO regulator for debugging

purposes.

• 2-3: Connects PF0100 VIN terminal to the main input supply. Refer to Figure 11.

J26

Open

Short to hold PWRON pin low.

J24

Open

Short to pull STANDBY to VSNVS voltage supply.

J30

2-3

I2C pull-up supply selector

• 1-2: Pull the SCL/SDA signals to the external 3.3V LDO regulator output.

• 2-3: Pull the SCL/SDA signals to the selected VDDIO supply.

If 3.3V LDO output is desired as the VDDIO and I2C supply, remove R33 and R34 and

short pins 1,2 and 3 to make sure VDDIO uses the same reference as the I2C supply.

J39

1-2

Control Interface input supply selector

• 1-2: Enables PVIN node as the input supply source for the control interface.

• 2-3: Enables USB power as the input supply source for the control interface.

KTPF0100UG Datasheet(PDF) 19 Page - Freescale Semiconductor, Inc

KTPF0100UG Datasheet(HTML) 19 Page - Freescale Semiconductor, Inc

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