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SPC5604SF2VLQ6 Datasheet(PDF) 73 Page - Freescale Semiconductor, Inc |
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SPC5604SF2VLQ6 Datasheet(HTML) 73 Page - Freescale Semiconductor, Inc |
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73 / 136 page  Electrical characteristics MPC5606S Microcontroller Data Sheet, Rev. 8 Freescale Semiconductor 73 Figure 11. Recommended order for powering down the power supplies CAUTION The VDD IO HV supply must be disabled after the VDDREG HV supply voltage drops below 1.5 V. This is to ensure that the 1.2 V regulator shuts down before the 3.3 V regulator shuts down. 3.7.5 Power-up inrush current profile Figure 12 shows the power up inrush current profile of the ballast transistor under the worst possible startup condition (fastest PVT and fastest power ramp time). Figure 12. Power-up inrush current profile VDDREG HV supply 2.7 V VDDREG HV POR (internal) 1.2 V regulator output Soft startup (approx. 200 s) VDD IO HV supply (3–5.5 V) > 1.5 V Time to discharge 40 F Capacitance depends on load 1.2 V supply Base control Current profile 3–5.5 V |
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