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ST1S40IPUR Datasheet(PDF) 19 Page - STMicroelectronics |
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ST1S40IPUR Datasheet(HTML) 19 Page - STMicroelectronics |
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19 / 30 page ![]() ST1S40 Application information Doc ID 17928 Rev 4 19/30 In order to prevent dynamic unbalance between VINSW and VINA, the trace connecting the VINA pin to the input must be derived from VINSW. The feedback pin (FB) connection to the external resistor divider is a high impedance node, so the interferences can be minimized through the routing of the feedback node with a very short trace and as far as possible from the high current paths. A single point connection from signal ground to power ground is suggested. Thanks to the exposed pad of the device, the ground plane helps to reduce the thermal resistance junction to ambient; so a large ground plane, soldered to the exposed pad, enhances the thermal performance of the converter allowing high power conversion. Figure 8. PCB layout guidelines Input cap as close as possible to VINSW pin Star center for common ground Short FB trace VINA derived from Cin To avoid dynamic voltage drop Between VINA and VINSW Short high switching current loop Via to connect the thermal pad To bottom or inner ground plane |
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