M68ICS08GR datasheet(254/408 Pages) FREESCALE

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Serial Communications Interface (SCI)

Technical Data

MC68HC908GR8 — Rev 4.0

254

Serial Communications Interface (SCI)

MOTOROLA

1 = 9-bit SCI characters

0 = 8-bit SCI characters

WAKE — Wakeup Condition Bit

This read/write bit determines which condition wakes up the SCI: a

logic 1 (address mark) in the most significant bit position of a received

character or an idle condition on the PE1/RxD pin. Reset clears the

WAKE bit.

1 = Address mark wakeup

0 = Idle line wakeup

ILTY — Idle Line Type Bit

This read/write bit determines when the SCI starts counting logic 1s

as idle character bits. The counting begins either after the start bit or

after the stop bit. If the count begins after the start bit, then a string of

logic 1s preceding the stop bit may cause false recognition of an idle

character. Beginning the count after the stop bit avoids false idle

character recognition, but requires properly synchronized

transmissions. Reset clears the ILTY bit.

1 = Idle character bit count begins after stop bit

0 = Idle character bit count begins after start bit

PEN — Parity Enable Bit

This read/write bit enables the SCI parity function. See Table 18-5.

When enabled, the parity function inserts a parity bit in the most

significant bit position. See Figure 18-3. Reset clears the PEN bit.

1 = Parity function enabled

0 = Parity function disabled

PTY — Parity Bit

This read/write bit determines whether the SCI generates and checks

for odd parity or even parity. See Table 18-5. Reset clears the PTY bit.

1 = Odd parity

0 = Even parity

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M68ICS08GR Datasheet(PDF) 254 Page - Freescale Semiconductor, Inc