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DSPIC33FJ12MC201TESS Datasheet(PDF) 204 Page - Microchip Technology |
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DSPIC33FJ12MC201TESS Datasheet(HTML) 204 Page - Microchip Technology |
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204 / 304 page  dsPIC33FJ12MC201/202 DS70265E-page 204 © 2007-2011 Microchip Technology Inc. ,2 REGISTER 20-6: AD1CSSL: ADC1 INPUT SCAN SELECT REGISTER LOW(1,2) U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 15 bit 8 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 — — CSS5 CSS4 CSS3 CSS2 CSS1 CSS0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-6 Unimplemented: Read as ‘0’ bit 5-0 CSS<5:0>: ADC Input Scan Selection bits 1 = Select ANx for input scan 0 = Skip ANx for input scan Note 1: On devices without 6 analog inputs, all AD1CSSL bits can be selected by user application. However, inputs selected for scan without a corresponding input on device converts VREFL. 2: CSSx = ANx, where x = 0 through 5. REGISTER 20-7: AD1PCFGL: ADC1 PORT CONFIGURATION REGISTER LOW(1,2,3) U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 15 bit 8 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 — — PCFG5 PCFG4 PCFG3 PCFG2 PCFG1 PCFG0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-6 Unimplemented: Read as ‘0’ bit 5-0 PCFG<5:0>: ADC Port Configuration Control bits 1 = Port pin in Digital mode, port read input enabled, ADC input multiplexer connected to AVSS 0 = Port pin in Analog mode, port read input disabled, ADC samples pin voltage Note 1: On devices without 6 analog inputs, all PCFG bits are R/W by user. However, PCFG bits are ignored on ports without a corresponding input on device. 2: PCFGx = ANx, where x = 0 through 5. 3: PCFGx bits have no effect if the ADC module is disabled by setting ADxMD bit in the PMDx register. When the bit is set, all port pins that have been multiplexed with ANx will be in Digital mode. |
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