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PIC16F1459-ESSQTP Datasheet(PDF) 371 Page - Microchip Technology |
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PIC16F1459-ESSQTP Datasheet(HTML) 371 Page - Microchip Technology |
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371 / 418 page ![]() 2012 Microchip Technology Inc. Preliminary DS41639A-page 371 PIC16(L)F1454/5/9 TABLE 29-5: TIMER0 AND TIMER1 EXTERNAL CLOCK REQUIREMENTS TABLE 29-6: PIC16(L)F1454/5/9 A/D CONVERTER (ADC) CHARACTERISTICS: Standard Operating Conditions (unless otherwise stated) Operating Temperature -40°C TA +125°C Param No. Sym. Characteristic Min. Typ† Max. Units Conditions 40* TT0H T0CKI High Pulse Width No Prescaler 0.5 TCY + 20 — — ns With Prescaler 10 — — ns 41* TT0L T0CKI Low Pulse Width No Prescaler 0.5 TCY + 20 — — ns With Prescaler 10 — — ns 42* TT0P T0CKI Period Greater of: 20 or TCY + 40 N — — ns N = prescale value (2, 4, ..., 256) 45* TT1H T1CKI High Time Synchronous, No Prescaler 0.5 TCY + 20 — — ns Synchronous, with Prescaler 15 — — ns Asynchronous 30 — — ns 46* TT1L T1CKI Low Time Synchronous, No Prescaler 0.5 TCY + 20 — — ns Synchronous, with Prescaler 15 — — ns Asynchronous 30 — — ns 47* TT1P T1CKI Input Period Synchronous Greater of: 30 or TCY + 40 N — — ns N = prescale value (1, 2, 4, 8) Asynchronous 60 — — ns 49* TCKEZTMR1 Delay from External Clock Edge to Timer Increment 2 TOSC —7 TOSC — Timers in Sync mode * These parameters are characterized but not tested. † Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: For proper operation, the minimum value of the ADC positive voltage reference must be 1.8V or greater. Standard Operating Conditions (unless otherwise stated) Operating temperature Tested at 25°C Param No. Sym. Characteristic Min. Typ† Max. Units Conditions AD01 NR Resolution — — 10 bit AD02 EIL Integral Error — — ±1.7 LSb VREF = 3.0V AD03 EDL Differential Error — — ±1 LSb No missing codes VREF = 3.0V AD04 EOFF Offset Error — — ±2.5 LSb VREF = 3.0V AD05 EGN Gain Error — — ±2.0 LSb VREF = 3.0V AD06 VREF Reference Voltage(3) 1.8 — VDD VVREF = (VREF+ minus VREF-) AD07 VAIN Full-Scale Range VSS —VREF V AD08 ZAIN Recommended Impedance of Analog Voltage Source —— 10 k Can go higher if external 0.01 F capacitor is present on input pin. * These parameters are characterized but not tested. † Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Total Absolute Error includes integral, differential, offset and gain errors. 2: The A/D conversion result never decreases with an increase in the input voltage and has no missing codes. 3: ADC VREF is from external VREF+ pin, VDD pin, whichever is selected as reference input. 4: When ADC is off, it will not consume any current other than leakage current. The power-down current specification includes any such leakage from the ADC module. |
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