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PIC16F1459-ESSQTP Datasheet(PDF) 410 Page - Microchip Technology |
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PIC16F1459-ESSQTP Datasheet(HTML) 410 Page - Microchip Technology |
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410 / 418 page  PIC16(L)F1454/5/9 DS41639A-page 410 Preliminary 2012 Microchip Technology Inc. Code Examples A/D Conversion......................................................... 159 Initializing PORTA............................................. 129, 131 Writing to Flash Program Memory ............................ 121 Comparator Associated Registers ................................................ 181 Operation .................................................................. 173 Comparator Module .......................................................... 173 Cx Output State Versus Input Conditions ................. 175 Comparator Specifications ................................................ 374 Comparators C2OUT as T1 Gate ................................................... 189 Complementary Waveform Generator (CWG) .......... 293, 294 CONFIG1 Register.............................................................. 52 CONFIG2 Register.............................................................. 54 Core Function Register ....................................................... 37 CPU Clock Divider .............................................................. 66 Customer Change Notification Service ............................. 415 Customer Notification Service........................................... 415 Customer Support ............................................................. 415 CWG Auto-shutdown Control ............................................. 300 Clock Source............................................................. 296 Output Control........................................................... 296 Selectable Input Sources .......................................... 296 CWGxCON0 Register ....................................................... 303 CWGxCON1 Register ....................................................... 304 CWGxCON2 Register ....................................................... 305 CWGxDBF Register .......................................................... 306 CWGxDBR Register.......................................................... 306 D DACCON0 (Digital-to-Analog Converter Control 0) Register.................................................... 172 DACCON1 (Digital-to-Analog Converter Control 1) Register.................................................... 172 Data Memory....................................................................... 26 DC and AC Characteristics ............................................... 383 DC Characteristics Extended and Industrial ............................................ 362 Industrial and Extended ............................................ 355 Development Support ....................................................... 385 Device Configuration........................................................... 51 Code Protection .......................................................... 55 Configuration Word ..................................................... 51 Device ID and Revision ID .......................................... 56 User ID ........................................................................ 55 Device ID Register .............................................................. 56 Device Overview ......................................................... 13, 107 Digital-to-Analog Converter (DAC).................................... 169 Associated Registers ................................................ 172 Effects of a Reset...................................................... 170 Specifications............................................................ 374 E Effects of Reset PWM mode ............................................................... 289 Electrical Specifications .................................................... 353 Enhanced Mid-Range CPU................................................. 21 Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART)............................... 257 Equations Estimating USB Transceiver Current Consumption..................................................... 322 Errata .................................................................................. 11 EUSART ........................................................................... 257 Associated Registers Baud Rate Generator ....................................... 271 Asynchronous Mode ................................................. 259 12-bit Break Transmit and Receive .................. 278 Associated Registers Receive .................................................... 265 Transmit.................................................... 261 Auto-Wake-up on Break ................................... 276 Baud Rate Generator (BRG) ............................ 270 Clock Accuracy................................................. 266 Receiver ........................................................... 262 Setting up 9-bit Mode with Address Detect ...... 264 Transmitter ....................................................... 259 Baud Rate Generator (BRG) Auto Baud Rate Detect..................................... 275 Baud Rate Error, Calculating............................ 270 Baud Rates, Asynchronous Modes .................. 272 Formulas........................................................... 271 High Baud Rate Select (BRGH Bit) .................. 270 Synchronous Master Mode............................... 279, 283 Associated Registers Receive .................................................... 282 Transmit.................................................... 280 Reception ......................................................... 281 Transmission .................................................... 279 Synchronous Slave Mode Associated Registers Receive .................................................... 284 Transmit.................................................... 283 Reception ......................................................... 284 Transmission .................................................... 283 Extended Instruction Set ADDFSR................................................................... 343 F Fail-Safe Clock Monitor ...................................................... 71 Fail-Safe Condition Clearing....................................... 71 Fail-Safe Detection ..................................................... 71 Fail-Safe Operation..................................................... 71 Reset or Wake-up from Sleep .................................... 71 Firmware Instructions ....................................................... 339 Fixed Voltage Reference (FVR)........................................ 149 Associated Registers ................................................ 150 Flash Program Memory .................................................... 112 Associated Registers ................................................ 128 Configuration Word w/ Flash Program Memory.............................................. 128 Erasing ..................................................................... 116 Modifying .................................................................. 122 Write Verify ............................................................... 124 Writing ...................................................................... 118 FSR Register ...................................................................... 37 FVRCON (Fixed Voltage Reference Control) Register..... 150 I I2C Mode (MSSP) Acknowledge Sequence Timing ............................... 242 Bus Collision During a Repeated Start Condition................... 246 During a Stop Condition ................................... 247 Effects of a Reset ..................................................... 243 I2C Clock Rate w/BRG.............................................. 249 Master Mode Operation.......................................................... 234 Reception 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