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PIC16F1459-ESSQTP Datasheet(PDF) 106 Page - Microchip Technology |
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PIC16F1459-ESSQTP Datasheet(HTML) 106 Page - Microchip Technology |
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106 / 418 page  PIC16(L)F1454/5/9 DS41639A-page 106 Preliminary 2012 Microchip Technology Inc. 9.3 Register Definitions: Voltage Regulator Control TABLE 9-1: SUMMARY OF REGISTERS ASSOCIATED WITH POWER-DOWN MODE REGISTER 9-1: VREGCON: VOLTAGE REGULATOR CONTROL REGISTER(1) U-0 U-0 U-0 U-0 U-0 U-0 R/W-0/0 R/W-1/1 — — — — — —VREGPM Reserved bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-2 Unimplemented: Read as ‘0’ bit 1 VREGPM: Voltage Regulator Power Mode Selection bit 1 = Low-Power Sleep mode enabled in Sleep(2) Draws lowest current in Sleep, slower wake-up 0 = Normal-Power mode enabled in Sleep(2) Draws higher current in Sleep, faster wake-up bit 0 Reserved: Read as ‘1’. Maintain this bit set. Note 1: PIC16LF1454/5/9 only. 2: See Section 29.0 “Electrical Specifications”. Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 96 IOCAF — — IOCAF5 IOCAF4 IOCAF3 — IOCAF1 IOCAF0 146 IOCAN — — IOCAN5 IOCAN4 IOCAN3 — IOCAN1 IOCAN0 145 IOCAP — — IOCAP5 IOCAP4 IOCAP3 — IOCAP1 IOCAP0 145 IOCBF(2) IOCBF7 IOCBF6 IOCBF5 IOCBF4 — — — — 147 IOCBN(2) IOCBN7 IOCBN6 IOCBN5 IOCBN4 — — — — 147 IOCBP(2) IOCBP7 IOCBP6 IOCBP5 IOCBP4 — — — — 146 PIE1 TMR1GIE ADIE(1) RCIE TXIE SSP1IE — TMR2IE TMR1IE 97 PIE2 OSFIE C2IE C1IE — BCL1IE USBIE ACTIE — 98 PIR1 TMR1GIF ADIF(1) RCIF TXIF SSP1IF — TMR2IF TMR1IF 99 PIR2 OSFIF C2IF C1IF — BCL1IF USBIF ACTIF — 100 STATUS — — —TO PD Z DC C 27 WDTCON — — WDTPS<4:0> SWDTEN 110 Legend: — = unimplemented, read as ‘0’. Shaded cells are not used in Power-Down mode. Note 1: PIC16(L)F1455/9 only. 2: PIC16(L)F1459 only. |
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