MCR03EZPFX1002 datasheet(20/36 Pages) IRF

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IR3837MPbF

Rev 1.31

Minimum on time Considerations

The minimum ON time is the shortest amount of

time for which the Control FET may be reliably

turned on, and this depends on the internal

timing delays. For the IR3837, the typical

minimum on-time is specified as 70 ns.

Any design or application using the IR3837 must

ensure operation with a pulse width that is higher

than this minimum on-time and preferably higher

than 150 ns. This is necessary for the circuit to

operate without jitter and pulse-skipping, which

can cause high inductor current ripple and high

output voltage ripple.

In any application that uses the IR3837, the

following condition must be satisfied:

The minimum output voltage is limited by the

reference voltage and hence V

out(min) = 0.6 V.

Therefore, for V

out(min) = 0.6 V,

Therefore, at the maximum recommended input

voltage 16V and minimum output voltage, the

converter should be designed at a switching

frequency that does not exceed 250 kHz.

Conversely, for operation at the maximum

recommended operating frequency (1.65 MHz)

and minimum output voltage (0.6V), The input

voltage (PVin) should not exceed 2.42V,

otherwise pulse skipping will happen.

At low output voltages (below 1V) specially at

Vo=0.6V, it is recommended to design the

compensator so that the bandwidth of the loop

does not exceed 1/10 of the switching frequency.

V/s

150

0.6

















(min)

out

Maximum Duty Ratio Considerations

A fixed off-time of 300 ns maximum is specified

for the IR3837. This provides an upper limit on

the operating duty ratio at any given switching

frequency. Thus, the higher the switching

frequency, the lower is the maximum duty ratio at

which the IR3837 can operate. To allow some

margin, the maximum operating duty ratio in any

application

using

the

IR3837

should

still

accommodate about 500 ns off-time. Fig 14.

shows a plot of the maximum duty ratio v/s the

switching frequency, with 300 ns off-time.

out

in 



(min)

out

(min)















Fig. 14. Maximum duty cycle v/s switching

frequency.

250

450

650

850

1050

1250

1450

1650

Switching Frequency (kHz)

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