MCR03EZPFX1002 datasheet(23/36 Pages) IRF

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IR3837MPbF

Rev 1.31

Where:

∆V

o = output voltage ripple

∆I

L = Inductor ripple current

Since the output capacitor has a major role in the

overall performance of the converter and

determines the result of transient response,

selection of the capacitor is critical. The IR3837

can perform well with all types of capacitors.

As a rule, the capacitor must have low enough

ESR to meet output ripple and load transient

requirements.

The goal for this design is to meet the voltage

ripple requirement in the smallest possible

capacitor size. Therefore it is advisable to select

ceramic capacitors due to their low ESR and ESL

and small size. Seven of Taiyo Yuden’s

JMK212BJ476MG-T

(47uF,

6.3V,

≈3mΩ)

capacitors is a good choice.

It is also recommended to use a 0.1µF ceramic

capacitor at the output for high frequency

filtering.

Feedback Compensation

The IR3837 is a voltage mode controller. The

control loop is a single voltage feedback path

including error amplifier and error comparator. To

achieve fast transient response and accurate

output regulation, a compensation circuit is

necessary. The goal of the compensation

network is to provide a closed-loop transfer

function with the highest 0 dB crossing frequency

and adequate phase margin (greater than 45o).

The output LC filter introduces a double pole,

–40dB/decade gain slope above its corner

resonant frequency, and a total phase lag of 180o

(see figure 18). The resonant frequency of the LC

filter is expressed as follows:

Figure 18 shows gain and phase of the LC filter.

Since we already have 180o phase shift from the

output filter alone, the system runs the risk of

being unstable.

The IR3837 uses a voltage-type error amplifier

with high-gain (110dB) and high-bandwidth

(30MHz). The output of the amplifier is available

for DC gain control and AC phase compensation.

The error amplifier can be compensated either in

type II or type III compensation.

Local feedback with Type II compensation is

shown in Fig. 19.

This method requires that the output capacitor

should have enough ESR to satisfy stability

requirements. If the output capacitor’s ESR

generates a zero at 5kHz to 50kHz, the zero

generates acceptable phase margin and the

Type II compensator can be used.

The ESR zero of the output capacitor is

expressed as follows:

(16)

..........





Fig. 18. Gain and Phase of LC filter

(17)

.......

..........

ESR

*ESR*C





Fig. 19. Type II compensation network

and its asymptotic gain plot

MCR03EZPFX1002 Datasheet(PDF) 23 Page - International Rectifier

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