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PIC18F1220E/SSSQTP Datasheet(PDF) 226 Page - Microchip Technology

Part # PIC18F1220E/SSSQTP
Description  18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers
PDF  308 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F1220E/SSSQTP Datasheet(HTML) 226 Page - Microchip Technology

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PIC18F1220/1320
DS39605F-page 224
© 2007 Microchip Technology Inc.
RLNCF
Rotate Left f (no carry)
Syntax:
[ label ]
RLNCF
f [,d [,a]]
Operands:
0
≤ f ≤ 255
d
∈ [0,1]
a
∈ [0,1]
Operation:
(f<n>)
→ dest<n + 1>,
(f<7>)
→ dest<0>
Status Affected:
N, Z
Encoding:
0100
01da
ffff
ffff
Description:
The contents of register ‘f’ are
rotated one bit to the left. If ‘d’ is ‘0’,
the result is placed in W. If ‘d’ is ‘1’,
the result is stored back in register
‘f’ (default). If ‘a’ is ‘0’, the Access
Bank will be selected, overriding
the BSR value. If ‘a’ is ‘1’, then the
bank will be selected as per the
BSR value (default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
Write to
destination
Example:
RLNCF
REG
Before Instruction
REG
=
1010 1011
After Instruction
REG
=
0101 0111
register f
RRCF
Rotate Right f through Carry
Syntax:
[ label ]
RRCF
f [,d [,a]]
Operands:
0
≤ f ≤ 255
d
∈ [0,1]
a
∈ [0,1]
Operation:
(f<n>)
→ dest<n – 1>,
(f<0>)
→ C,
(C)
→ dest<7>
Status Affected:
C, N, Z
Encoding:
0011
00da
ffff
ffff
Description:
The contents of register ‘f’ are
rotated one bit to the right through
the Carry flag. If ‘d’ is ‘0’, the result
is placed in W. If ‘d’ is ‘1’, the result
is placed back in register ‘f’
(default). If ‘a’ is ‘0’, the Access
Bank will be selected, overriding
the BSR value. If ‘a’ is ‘1’, then the
bank will be selected as per the
BSR value (default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
Write to
destination
Example:
RRCF
REG, W
Before Instruction
REG
=
1110 0110
C=
0
After Instruction
REG
=
1110 0110
W
=
0111 0011
C=
0
C
register f



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