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PIC18F1220E/SSSQTP Datasheet(PDF) 227 Page - Microchip Technology

Part # PIC18F1220E/SSSQTP
Description  18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers
PDF  308 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F1220E/SSSQTP Datasheet(HTML) 227 Page - Microchip Technology

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© 2007 Microchip Technology Inc.
DS39605F-page 225
PIC18F1220/1320
RRNCF
Rotate Right f (no carry)
Syntax:
[ label ]
RRNCF
f [,d [,a]]
Operands:
0
≤ f ≤ 255
d
∈ [0,1]
a
∈ [0,1]
Operation:
(f<n>)
→ dest<n – 1>,
(f<0>)
→ dest<7>
Status Affected:
N, Z
Encoding:
0100
00da
ffff
ffff
Description:
The contents of register ‘f’ are
rotated one bit to the right. If ‘d’ is
‘0’, the result is placed in W. If ‘d’ is
‘1’, the result is placed back in
register ‘f’ (default). If ‘a’ is ‘0’, the
Access Bank will be selected,
overriding the BSR value. If ‘a’ is
‘1’, then the bank will be selected
as per the BSR value (default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
Write to
destination
Example 1:
RRNCF
REG, 1, 0
Before Instruction
REG
=
1101 0111
After Instruction
REG
=
1110 1011
Example 2:
RRNCF
REG, W
Before Instruction
W=
?
REG
=
1101 0111
After Instruction
W
=
1110 1011
REG
=
1101 0111
register f
SETF
Set f
Syntax:
[ label ] SETF
f [,a]
Operands:
0
≤ f ≤ 255
a
∈ [0,1]
Operation:
FFh
→ f
Status Affected:
None
Encoding:
0110
100a
ffff
ffff
Description:
The contents of the specified
register are set to FFh. If ‘a’ is ‘0’,
the Access Bank will be selected,
overriding the BSR value. If ‘a’ is
‘1’, then the bank will be selected
as per the BSR value (default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
Write
register ‘f’
Example:
SETF
REG
Before Instruction
REG
=
0x5A
After Instruction
REG
=
0xFF



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