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PIC18F1220E/SSSQTP Datasheet(PDF) 260 Page - Microchip Technology |
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PIC18F1220E/SSSQTP Datasheet(HTML) 260 Page - Microchip Technology |
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260 / 308 page  PIC18F1220/1320 DS39605F-page 258 © 2007 Microchip Technology Inc. TABLE 22-5: PLL CLOCK TIMING SPECIFICATIONS, HS/HSPLL MODE (VDD = 4.2V TO 5.5V) Param No. Sym Characteristic Min Typ† Max Units Conditions F10 FOSC Oscillator Frequency Range 4 — 10 MHz HS and HSPLL mode only F11 FSYS On-Chip VCO System Frequency 16 — 40 MHz HSPLL mode only F12 TPLL PLL Start-up Time (Lock Time) — — 2 ms HSPLL mode only F13 ΔCLK CLKO Stability (Jitter) -2 — +2 % HSPLL mode only † Data in “Typ” column is at 5V, 25 °C unless otherwise stated. These parameters are for design guidance only and are not tested. TABLE 22-6: INTERNAL RC ACCURACY: PIC18F1220/1320 (INDUSTRIAL) PIC18LF1220/1320 (INDUSTRIAL) PIC18LF1220/1320 (Industrial) Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for industrial PIC18F1220/1320 (Industrial) Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for industrial -40°C ≤ TA ≤ +125°C for extended Param No. Device Min Typ Max Units Conditions INTOSC Accuracy @ Freq = 8 MHz, 4 MHz, 2 MHz, 1 MHz, 500 kHz, 250 kHz, 125 kHz(1) PIC18LF1220/1320 -2 +/-1 2 % +25°C VDD = 2.7-3.3V -5 — 5 % -10°C to +85°C VDD = 2.7-3.3V -10 — 10 % -40°C to +85°C VDD = 2.7-3.3V PIC18F1220/1320PIC18F 1220/1320 -2 +/-1 2 % +25°C VDD = 4.5-5.5V -5 — 5 % -10°C to +85°C VDD = 4.5-5.5V -10 — 10 % -40°C to +85°C VDD = 4.5-5.5V INTRC Accuracy @ Freq = 31 kHz(2) PIC18LF1220/1320 26.562 — 35.938 kHz -40°C to +85°C VDD = 2.7-3.3V PIC18F1220/1320PIC18F 1220/1320 26.562 — 35.938 kHz -40°C to +85°C VDD = 4.5-5.5V Legend: Shading of rows is to assist in readability of the table. Note 1: Frequency calibrated at 25°C. OSCTUNE register can be used to compensate for temperature and VDD drift. 2: INTRC frequency after calibration. 3: Change of INTRC frequency as VDD changes. |
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