ZL2102ALAFTK datasheet(13/58 Pages) INTERSIL

13 / 58 page

ZL2102

FN8440.1

August 22, 2013

When Auto Comp is enabled, it will run once each time the part is

enabled. Auto Comp runs a series of tests on the output and

calculates the optimal tap coefficients immediately after the

VOUT ramp completes. The calculated tap coefficients are stored

in the Auto Comp Store and may be read back through the

PID_TAPS PMBus command. If auto compensation is disabled,

the device will use the tap coefficients that are stored in the

USER_STORE.

If the PG Assert parameter is set to "Use PG Delay," the PG pin

will be asserted according to the POWER_GOOD_DELAY

command. When Auto Comp is enabled and the "Use PG Delay"

option is selected, the user must ensure that the output

perturbation from the Auto Comp test cycle is acceptable before

PG is asserted. If PG Assert is set to "After Auto Comp," PG will

be asserted immediately after the Auto Comp cycle completes

(POWER_GOOD_DELAY will be ignored in this case).

The Auto Comp Gain control scales the Auto Comp results to

allow a trade-off between transient response and steady-state

duty cycle jitter. A setting of 100% will provide the fastest

transient response while a setting of 10% will produce the lowest

jitter. For best results, VIN must be stable before Auto Comp

begins as shown in Equation 2:

The auto compensation function can also be configured via the

AUTO_COMP_CONFIG PMBus command and controlled using the

AUTO_COMP_CONTROL PMBus command. Compensation values

can be programmed manually by disabling Auto Comp and

writing preferred values to the PID_TAPS PMBus command.

Synchronization and Sequencing

Configuration Settings (CFG)

The ZL2102 supports several options of clock synchronization

and output sequencing. The ZL2102's configuration settings can

be set using the CFG pin-strap options shown in Table 5. The

operation of these functions is covered in their respective

sections of this document.

Switching Frequency Setting (SYNC)

The ZL2102's switching frequency can be set from 200kHz to

1000kHz using the SYNC pin-strap options shown in Table 6.

The switching frequency can also be set to any value between

200kHz and 1MHz using the FREQUENCY_SWITCH PMBus

command. The available frequencies below 1MHz are defined by

fSW = 8 MHz/N, where 8 ≤ N ≤ 40.

If a value other than fSW = 8 MHz/N is entered using the PMBus

command, the device will select the switching frequency value

using N as a whole number to achieve a value nearest to the

entered value. For example, if 810 kHz is entered, the device will

select 800kHz (N = 10).

Note: The switching frequency read back using the appropriate

PMBus command may differ slightly from the programmed

value. The difference is due to hardware quantization.

OPEN

After Auto Comp

HIGH

After PG Delay

26.1

After Auto Comp

40%

28.7

After PG Delay

31.6

After Auto Comp

30%

34.8

After PG Delay

38.3

After Auto Comp

20%

42.2

After PG Delay

46.4

After Auto Comp

10%

51.1

After PG Delay

TABLE 4. (Continued)

RFC

(kΩ)PG ASSERT

AUTO COMP GAIN

(%)

ΔV

VIN

NOM

------------------------ in%

()

100%

256

OUT

•

VIN

NOM

-------------------------------

-----------------------------------------

≤

(EQ. 2)

TABLE 5.

RCFG

(kΩ)

SYNC PIN

CONFIGURATION

SEQUENCING CONFIGURATION

LOW

Input

Sequencing Disabled.

OPEN

Auto detect

HIGH

Output

14.7

Input

Device is FIRST in Nested

Sequence.

16.2

Auto detect

17.8

Output

21.5

Input

Device is LAST in Nested

Sequence.

23.7

Auto detect

26.1

Output

31.6

Input

Device is MIDDLE in Nested

Sequence.

34.8

Auto detect

38.3

Output

TABLE 6.

RSYNC

(kΩ)

FREQ

(kHz)

RSYNC

(kΩ)

FREQ

(kHz)

LOW

200

21.5

471

222

23.7

500

242

26.1

533

12.1

267

28.7

571

13.3

296

31.6

615

14.7

320

34.8

667

16.2

364

38.3

727

OPEN

400

42.2

800

17.8

421

46.4

889

19.6

445

HIGH

1000

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