AD5381BSTZ-5 datasheet(33/40 Pages) AD

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Data Sheet

AD5381

Rev. D | Page 33 of 40

APPLICATION INFORMATION

POWER SUPPLY DECOUPLING

In any circuit where accuracy is important, careful considera-

tion of the power supply and ground return layout helps to

ensure the ratedperformance. The printed circuit board on

which the AD5381 is mounted should be designed so that the

analog and digital sections are separatedand confined to

certain areas of the board. If the AD5381 is in a system where

multiple devices requirean AGND-to-DGNDconnection, the

connection should be made at onepoint only, a star ground

point established as close to the device as possible.

For supplies with multiple pins (AVDD, DVDD), thesepins

should be tied together. TheAD5381 should haveample supply

bypassing of 10 µF in parallel with 0.1 µF on each supply,

located as close to the package as possibleand ideally right

up against the device. The 10 µF capacitors are the tantalum

bead type. The 0.1 µF capacitor should havelow effective series

resistance (ESR)and effective series inductance (ESI), like the

common ceramictypes that providea low impedance path to

ground at high frequencies, to handletransient currents dueto

internal logic switching.

The power supplylines of the AD5381 should use as largea

trace as possible to providelow impedance paths and reduce

the effects of glitches on the power supply line. Fast switching

signals such as clocks should be shielded with digital ground

to avoid radiating noise to other partsof the board, andshould

never be run near the reference inputs.A ground line routed

between the D

IN and SCLK lines will help reduce crosstalk

between them(this is not required on a multilayerboard

because therewill be a separate ground plane, butseparat-

ing the lines will help). It is essential to minimize noise on

the REFOUT/REFIN line.

Avoid crossover of digital and analog signals. Traceson

opposite sides of the board should run at right angles to

each other. This reduces the effects of feedthrough through

the board. A micro-strip technique is by far the best, but is

not always possible with a double-sided board. In this tech-

nique, the component side of the boardis dedicated to the

ground plane while signal traces are placed on the solder side.

TYPICAL CONFIGURATIONCIRCUIT

Figure 39 shows a typical configuration for the AD5381-5

when configured for use with an external reference. In the

circuit shown, all AGND, SIGNAL_GND, and DAC_GND pins

are tied together to a common AGND. AGNDand DGNDare

connected togetherat the AD5381 device. On power-up, the

AD5381 defaults to external reference operation. All AVDD

lines are connected together and driven from the same5 V

source. It is recommended to decoupleclose to the device

with a 0.1 µF ceramicand a 10 µF tantalum capacitor. In this

application, the referencefor the AD5381-5 is provided

externally from eitheran ADR421 or ADR431 2.5 V reference.

Suitable external references for theAD5381-3 include the

ADR280 1.2 V reference. The reference should be decoupledat

the REFOUT/REFIN pin of the device with a 0.1 µF capacitor.

ADR431/

ADR421

AD5381-5

AVDD

DVDD

SIGNAL_GND

DAC_GND

DGND

VOUT39

VOUT0

AGND

REFOUT/REFIN

REFGND

0.1

µF

0.1

µF

0.1

µF

AVDD

DVDD

Figure 39. Typical Configuration with External Reference

Figure 40 shows a typical configuration when using the internal

reference. On power-up, the AD5381 defaults to an external

reference; therefore, the internal reference needs to be config-

ured and turned on via a write to the AD5381 control register.

Control Register Bit CR10 allows the user to choosethe

referencevalue; Bit CR8 is used to select the internal reference.

It is recommended to use the 2.5 V reference when AVDD=

5 V, and the 1.25 V reference when AVDD= 3 V.

AD5381

AVDD

DVDD

SIGNAL_GND

DAC_GND

DGND

VOUT39

VOUT0

AGND

REFOUT/REFIN

REFGND

0.1

µF

0.1

µF

0.1

µF

AVDD

DVDD

Figure 40. Typical Configuration with Internal Reference

Digital connections have been omitted forclarity. The AD5381

contains an internal power-on reset circuit with a 10 ms brown-

out time. If the power supply ramp rate exceeds10 ms, the user

should reset the AD5381 as part of the initialization process to

ensure the calibration datais loaded correctly into the device.

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